Electrode substrate resistant to wire breakage for an active matrix display device

Abstract

An electrode substrate comprising a first conductive layer having a narrowed wiring region, defining a boundary region, separating a first wiring pattern and a second wiring pattern of the first conductive layer. The electrode substrate further comprises a second conductive layer in electrical contact with the first conductive layer, the second conductive layer having a narrowed wiring region, defining another boundary region, separating a third wiring pattern and a fourth wiring pattern of the second conductive layer. The boundary region of the first conductive layer and the boundary region of the second conductive layer do not overlap each other

What is claimed is:  
     
       1. An electrode substrate comprising: 
       a first conductive layer having a narrowed wiring region, defining a boundary region, separating a first wiring pattern and a second wiring pattern of the first conductive layer; and  
       a second conductive layer in electrical contact with the first conductive layer, the second conductive layer having a narrowed wiring region, defining another boundary region, separating a third wiring pattern and a fourth wiring pattern of the second conductive layer;  
       wherein the boundary region of the first conductive layer and the boundary region of the second conductive layer do not overlap each other.  
     
     
       2. The electrode substrate according to claim  1 , wherein said electrode substrate comprises one or more of said first conductive layers and one or more of said second conductive layers; and 
       wherein one of said one or more first conductive layers and one of said one or more second conductive layers in contact with said one of said one or more first conductive layers together form a scanning line.  
     
     
       3. The electrode substrate according to claim  1 , wherein said electrode substrate comprises one or more of said first conductive layers and one or more of said second conductive layers; and 
       wherein one of said one or more first conductive layers and one of said one or more second conductive layers in contact with said one of said one or more first conductive layers together form a storage capacitor line.  
     
     
       4. The electrode substrate according to claim  1 , wherein said electrode substrate comprises one or more of said first conductive layers and one or more of said second conductive layers; and 
       wherein one of said one or more first conductive layers and one of said one or more second conductive layers in contact with said one of said one or more first conductive layers together form a signal line.  
     
     
       5. The electrode substrate according to claim  4 , further comprising a display pixel region having a plurality of pixel electrodes. 
     
     
       6. The electrode substrate according to claim  5 , wherein at least one of the first conductive layer and the second conductive layer is formed during the formation of the plurality of pixel electrodes. 
     
     
       7. The electrode substrate according to claim  5 , wherein at least one of the first conductive layer and second conductive layer is electrically connected to the plurality of pixel electrodes through at least switch elements. 
     
     
       8. The electrode substrate according to claim  7 , wherein the switch elements are thin film transistors. 
     
     
       9. The electrode substrate according to claim  4 , wherein the first conductive layer is made of indium tin oxide. 
     
     
       10. A. The electrode substrate according to claim  1 , further comprising a display pixel region having a plurality of pixel electrodes. 
     
     
       11. An electrode substrate comprising a signal line, wherein the signal line comprises: 
       a first conductive layer having a narrowed wiring region, defining a boundary region, separating a first wiring pattern and a second wiring pattern of the first conductive layer; and  
       a second conductive layer in electrical contact with the first conductive layer, the second conductive layer having a narrowed wiring region, defining another boundary region, separating a third wiring pattern and a fourth wiring pattern of the second conductive layer;  
       wherein the boundary region of the first conductive layer and the boundary region of the second conductive layer do not overlap each other.  
     
     
       12. An electrode substrate comprising: 
       a first conductive layer having a boundary region separating a first wiring pattern and a second wiring pattern of the first conductive layer; and  
       a second conductive layer in electrical contact with the first conductive layer, the second conductive layer having an another boundary region separating a third wiring pattern and a fourth wiring pattern of the second conductive layer;  
       wherein the boundary region of the first conductive layer and the boundary region of the second conductive layer do not overlap each other; and  
       wherein the formation of said electrode substrate comprises:  
       depositing a first conductive film;  
       applying a first photoresist to said deposited first conductive film;  
       exposing a first area of the applied first photoresist using a first mask pattern;  
       exposing a second area of the applied first photoresist using a second mask pattern, wherein a part of the exposed second area of the applied first photoresist overlaps a part of the exposed first area of the applied first photoresist;  
       developing said exposed first photoresist to form a first resist pattern;  
       patterning said first conductive film in accordance with said first resist pattern to form a first conductive layer including a first wiring pattern, a second wiring pattern, and a boundary region;  
       depositing a second conductive film;  
       applying a second photoresist to said deposited second conductive film;  
       exposing a third area of the applied second photoresist using a third mask pattern;  
       exposing a fourth area of the applied second photoresist using a fourth mask pattern, wherein a part of the exposed fourth area of the applied second photoresist overlaps a part of the exposed third area of the applied second photoresist;  
       developing said exposed second photoresist to form a second resist pattern;  
       patterning said second conductive film in accordance with said second resist pattern to form a second conductive layer including a third wiring pattern, a fourth wiring pattern, and another boundary region.  
     
     
       13. The electrode substrate according to claim  12 , wherein said electrode substrate comprises one or more of said first conductive layers and one or more of said second conductive layers; and 
       wherein one of said one or more first conductive layers and one of said one or more second conductive layers in contact with said one of said one or more first conductive layers together form a scanning line.  
     
     
       14. The electrode substrate according to claim  12 , wherein said electrode substrate comprises one or more of said first conductive layers and one or more of said second conductive layers; and 
       wherein one of said one or more first conductive layers and one of said one or more second conductive layers in contact with said one of said one or more first conductive layers together form a storage capacitor line.  
     
     
       15. The electrode substrate according to claim  12 , wherein said electrode substrate comprises one or more of said first conductive layers and one or more of said second conductive layers; and 
       wherein one of said one or more first conductive layers and one of said one or more second conductive layers in contact with said one of said one or more first conductive layers together form a signal line.  
     
     
       16. The electrode substrate according to claim  15 , further comprising a display pixel region having a plurality of pixel electrodes. 
     
     
       17. The electrode substrate according to claim  16 , wherein at least one of the first conductive layer and the second conductive layer is formed during the formation of the plurality of pixel electrodes. 
     
     
       18. The electrode substrate according to claim  16 , wherein at least one of the first conductive layer or second conductive layer is electrically connected to the plurality of pixel electrodes through at least switch elements. 
     
     
       19. The electrode substrate according to claim  18 , wherein the switch elements are thin film transistors. 
     
     
       20. The electrode substrate according to claim  15 , wherein the first conductive layer is made of indium tin oxide. 
     
     
       21. The electrode substrate according to claim  12 , further comprising a display pixel region having a plurality of pixel electrodes. 
     
     
       22. The electrode substrate according to claim  12 , wherein the double exposure regions have an overlap length between 0 μm and 10 μm including 10 μm.