Method of fabricating static random access memory cell with vertically arranged drive transistors

Abstract

A method of fabricating an SRAM cell having a first conductivity type substrate includes the steps of forming a well of a second conductivity type in the first conductivity type substrate, forming a first active region of a first access transistor and a second active region of a second access transistor in the well, the first and second active regions being in parallel with each other, forming a first trench in the first active region and a second trench in the second active region, wherein the first and second trenches extend into the substrate through the well, forming gate electrodes of the first and second access transistors on the active regions, forming gate electrodes of first and second drive transistors in the first and second trenches, respectively, implanting first conductivity type impurity ions into the active regions of the first and second access transistors, respectively, forming first and second load devices on the substrate, the first and second load devices electrically contacting first terminals of the first and second access transistors, and first and second bit lines electrically contacting second terminals of the first and second access transistors.

What is claimed is:  
     
       1. A method of fabricating an SRAM cell having a first conductivity type substrate, the method comprising the steps of: 
       forming a well of a second conductivity type in the first conductivity type substrate;  
       forming a first active region of a first access transistor and a second active region of a second access transistor in the well, the first and second active regions being in parallel with each other;  
       forming a first trench in the first active region and a second trench in the second active region, wherein the first and second trenches extend into the first conductivity type substrate through the well;  
       forming gate electrodes of the first and second access transistors on the active regions;  
       forming gate electrodes of first and second drive transistors in the first and second trenches, respectively;  
       implanting first conductivity type impurity ions into the active regions of the first and second access transistors, respectively;  
       forming first and second load devices on the substrate, the first and second load devices electrically contacting first terminals of the first and second access transistors; and  
       forming first and second bit lines electrically contacting second terminals of the first and second access transistors.  
     
     
       2. The method according to claim  1 , wherein the gate electrodes of the access transistors and gate electrodes of the drive transistors are formed simultaneously. 
     
     
       3. The method according to claim  1 , wherein, in the step of forming the gate electrodes of the first and second drive transistors, channels thereof are formed vertically. 
     
     
       4. The method according to claim  1 , wherein the first terminals of the first and second access transistors are formed in the first and second trenches, respectively. 
     
     
       5. The method according to claim  1 , wherein the first terminals of the access transistors are formed common drain regions of the access and drive transistors. 
     
     
       6. The method according to claim  1 , further comprising the step of forming a gate insulating layer on the first conductivity type substrate and in the well of the second conductivity type prior to the steps of forming gate electrodes of the access and drive transistors. 
     
     
       7. A method of fabricating an SRAM cell having a first conductivity type substrate, the method comprising the steps of: 
       forming a well of a second conductivity type in the substrate;  
       forming first and second active regions in the well;  
       forming first and second trenches in the first and second active regions, respectively, wherein the first and second trenches extend into the first conductivity type substrate through the well; and  
       forming gate electrodes of first and second drive transistors in the first and second trenches, respectively.