Driver circuit for controlling a piezoelectric actuator in charge mode

Abstract

A driver circuit for controlling a piezoelectric actuator in a charge mode includes an amplifier having a first input terminal for receiving a control voltage, a second input terminal, and a main final stage with a main output terminal connected to the piezoelectric actuator. The amplifier also includes an additional final stage with an additional output terminal connected to the second input terminal. The main final stage and the additional final stage are connected in parallel with one another so that a current which passes through the main output terminal is proportional in accordance with a predefined factor to a current which passes through the additional output terminal. The driver circuit includes a device having a constant capacitance connected to the second input terminal so that an electrical charge transferred to the piezoelectric actuator is correlated with the control voltage in accordance with the predefined factor and the capacitance.

That which is claimed is:  
     
       1. A driver circuit for controlling a piezoelectric actuator in a charge mode, the driver circuit comprising: 
       an amplifier having a first input terminal for receiving a control voltage, and a second input terminal, said amplifier comprising  
       a main final stage having a main output terminal for connecting to the piezoelectric actuator, and  
       an additional final stage having an additional output terminal connected to the second input terminal,  
       the main final stage and the additional final stage being connected in parallel with one another so that a current through the main output terminal is proportional to a current through the additional output terminal in accordance with a predefined factor; and  
       a capacitance device connected to the second input terminal and having a constant capacitance value so that an electrical charge transferred to the piezoelectric actuator is correlated with the control voltage in accordance with the predefined factor and the capacitance value.  
     
     
       2. A driver circuit according to claim  1 , wherein the predefined factor is greater than  1 . 
     
     
       3. A driver circuit according to claim  1 , wherein the predefined factor is between a range of about 1 to 100. 
     
     
       4. A driver circuit according to claim  1 , wherein said capacitance device is connected to a reference terminal along with the piezoelectric actuator. 
     
     
       5. A driver circuit according to claim  1 , wherein said amplifier comprises an operational amplifier wherein the first input terminal is a non-inverting input terminal and the second input terminal is an inverting input terminal. 
     
     
       6. A driver circuit according to claim  1 , wherein said main final stage and said additional final stage each comprises a symmetrically complementary structure. 
     
     
       7. A driver circuit according to claim  6 , wherein: 
       said amplifier comprises a differential input stage having first and second terminals connected to respective first and second input terminals, first and second output terminals, and first and second voltage supply terminals;  
       said main final stage comprising first and second transistors connected together, said first and second transistors having opposite polarities and each having a first power terminal connected to the main output terminal;  
       said additional final stage comprising third and fourth transistors connected together, said third transistor having a same polarity as said first transistor, said fourth transistor having a same polarity as said second transistor, and said third and fourth transistors each having a first power terminal connected to the additional output terminal;  
       said first and third transistors each having a second power terminal connected to the first supply terminal, and a control terminal connected to the first output terminal of said differential stage; and  
       said second and fourth transistors each having a second power terminal connected to the second supply terminal, and a control terminal connected to the second output terminal of said differential stage.  
     
     
       8. A driver circuit according to claim  7 , wherein said first and third transistors each comprises an n-channel MOS transistor; and wherein said second and fourth transistors each comprises a p-channel MOS transistor. 
     
     
       9. A driver circuit for controlling a piezoelectric actuator in a charge mode, the driver circuit comprising: 
       an amplifier having a first input terminal for receiving a control voltage, and a second input terminal, said amplifier comprising  
       a main final stage having a main output terminal for connecting to the piezoelectric actuator, and  
       an additional final stage having an additional output terminal connected to the second input terminal,  
       the main final stage and the additional final stage being connected in parallel with one another so that a current through the main output terminal is based upon a current through the additional output terminal in accordance with a predefined factor; and  
       a capacitance device connected to the second input terminal.  
     
     
       10. A driver circuit according to claim  9 , wherein the predefined factor is greater than  1 . 
     
     
       11. A driver circuit according to claim  9 , wherein the predefined factor is between a range of about 1 to 100. 
     
     
       12. A driver circuit according to claim  9 , wherein said capacitance device is connected to a reference terminal along with the piezoelectric actuator. 
     
     
       13. A driver circuit according to claim  9 , wherein said amplifier comprises an operational amplifier wherein the first input terminal is a non-inverting input terminal and the second input terminal is an inverting input terminal. 
     
     
       14. A driver circuit according to claim  9 , wherein said main final stage and said additional final stage each comprises a symmetrically complementary structure. 
     
     
       15. A driver circuit according to claim  9 , wherein: 
       said amplifier comprises a differential input stage having first and second terminals connected to respective first and second input terminals, first and second output terminals, and first and second voltage supply terminals;  
       said main final stage comprising first and second transistors connected together, said first and second transistors having opposite polarities and each having a first power terminal connected to the main output terminal;  
       said additional final stage comprising third and fourth transistors connected together, said third transistor having a same polarity as said first transistor, said fourth transistor having a same polarity as said second transistor, and said third and fourth transistors each having a first power terminal connected to the additional output terminal;  
       said first and third transistors each having a second power terminal connected to the first supply terminal, and a control terminal connected to the first output terminal of said differential stage; and  
       said second and fourth transistors each having a second power terminal connected to the second supply terminal, and a control terminal connected to the second output terminal of said differential stage.  
     
     
       16. A driver circuit according to claim  15 , wherein said first and third transistors each comprises an n-channel MOS transistor; and wherein said second and fourth transistors each comprises a p-channel MOS transistor. 
     
     
       17. A disk-storage device comprising: 
       a read/write head;  
       at least one suspension arm connected to said read/write head;  
       a main actuator connected to said at least one suspension arm for pivoting the same; and  
       a piezoelectric actuator for pivoting a free end of said at least one suspension arm;  
       a driver circuit connected to said piezoelectric actuator for controlling said piezoelectric actuator in a charge mode, said driver circuit comprising the driver circuit comprising:  
       an amplifier having a first input terminal for receiving a control voltage, and a second input terminal, said amplifier comprising  
       a main final stage having a main output terminal for connecting to the piezoelectric actuator, and  
       an additional final stage having an additional output terminal connected to the second input terminal,  
       the main final stage and the additional final stage being connected in parallel with one another so that a current through the main output terminal is based upon a current through the additional output terminal in accordance with a predefined factor; and  
       a capacitance device connected to the second input terminal.  
     
     
       18. A disk-storage device according to claim  17 , wherein the predefined factor is greater than 1. 
     
     
       19. A disk-storage device according to claim  17 , wherein the predefined factor is between a range of about 1 to 100. 
     
     
       20. A disk-storage device according to claim  17 , wherein said capacitance device is connected to a reference terminal along with said piezoelectric actuator. 
     
     
       21. A disk-storage device according to claim  17 , wherein said amplifier comprises an operational amplifier wherein the first input terminal is a non-inverting input terminal and the second input terminal is an inverting input terminal. 
     
     
       22. A disk-storage device according to claim  17 , wherein said main final stage and said additional final stage each comprises a symmetrically complementary structure. 
     
     
       23. A disk-storage device according to claim  22 , wherein: 
       said amplifier comprises a differential input stage having first and second terminals connected to respective first and second input terminals, first and second output terminals, and first and second voltage supply terminals;  
       said main final stage comprising first and second transistors connected together, said first and second transistors having opposite polarities and each having a first power terminal connected to the main output terminal;  
       said additional final stage comprising third and fourth transistors connected together, said third transistor having a same polarity as said first transistor, said fourth transistor having a same polarity as said second transistor, and said third and fourth transistors each having a first power terminal connected to the additional output terminal;  
       said first and third transistors each having a second power terminal connected to the first supply terminal, and a control terminal connected to the first output terminal of said differential stage; and  
       said second and fourth transistors each having a second power terminal connected to the second supply terminal, and a control terminal connected to the second output terminal of said differential stage.  
     
     
       24. A disk-storage device according to claim  23 , wherein said first and third transistors each comprises an n-channel MOS transistor; and wherein said second and fourth transistors each comprises a p-channel MOS transistor. 
     
     
       25. A disk-storage device according to claim  17 , wherein the storage device is a magnetic hard disk. 
     
     
       26. A method for controlling a piezoelectric actuator in a charge mode using a driver circuit comprising an amplifier including a main final stage having a main output terminal connected to the piezoelectric actuator and an additional final stage having an additional output terminal connected to a second input terminal, the main final stage and the additional final stage being connected in parallel, the step of controlling comprising the step of: 
       applying a control voltage to a first input terminal of the amplifier for conducting current through the main output terminal based upon current conducting through the additional output terminal in accordance with a predefined factor.  
     
     
       27. A method according to claim  26 , wherein the step of selecting comprises selecting the predefined factor to be greater than 1. 
     
     
       28. A method according to claim  26 , wherein the step of selecting comprises selecting the predefined factor to be between a range of about 1 to 100. 
     
     
       29. A method according to claim  26 , wherein a capacitor is connected to a reference terminal along with the piezoelectric actuator. 
     
     
       30. A method according to claim  26 , wherein amplifier comprises an operational amplifier wherein the first input terminal is a non-inverting input terminal and the second input terminal is an inverting input terminal. 
     
     
       31. A method according to claim  26 , wherein the main final stage and the additional final stage each comprises a symmetrically complementary structure.