Nonvolatile semiconductor memory device

Abstract

A nonvolatile semiconductor memory device has writing signal line selecting transistors for applying writing signals to memory elements, respectively, reading signal line selecting transistors for delivering reading signals from the memory elements, respectively, and bit line selecting transistors connected between the writing signal line selecting transistors or the reading signal line selecting transistors and the memory elements, for selecting bit lines of each of the memory elements.

What is claimed is:  
     
       1. A nonvolatile semiconductor memory device comprising: 
       a plurality of memory elements for electrically writing data therein and erasing data therefrom;  
       writing signal line selecting transistors for applying writing signals to said memory elements, respectively; and  
       reading signal line selecting transistors, which are different from said writing signal line selecting transistors, for delivering reading signals from said memory elements, respectively.  
     
     
       2. A nonvolatile semiconductor memory device according to claim  1 , wherein said writing signal line selecting transistors and said reading signal line selecting transistors are integrally combined with each other. 
     
     
       3. A nonvolatile semiconductor memory device according to claim  1 , wherein said writing signal line selecting transistors have a thick gate oxide film and a large resistance. 
     
     
       4. A nonvolatile semiconductor memory device according to claim  1 , wherein said reading signal line selecting transistors have a small resistance. 
     
     
       5. A nonvolatile semiconductor memory device comprising: 
       a plurality of memory elements for electrically writing data therein and erasing data therefrom;  
       writing signal line selecting transistors for applying writing signals to said memory elements, respectively;  
       reading signal line selecting transistors, which are different from said writing signal line selecting transistors, for delivering reading signals from said memory elements, respectively; and  
       bit line selecting transistors connected between said writing signal line selecting transistors or said reading signal line selecting transistors and said memory elements, for selecting bit lines of each of said memory elements.  
     
     
       6. A nonvolatile semiconductor memory device according to claim  5 , wherein said writing signal line selecting transistors and said reading signal line selecting transistors are integrally combined with each other. 
     
     
       7. A nonvolatile semiconductor memory device according to claim  5 , wherein said writing signal line selecting transistors have a thick gate oxide film and a large resistance. 
     
     
       8. A nonvolatile semiconductor memory device according to claim  5 , wherein said reading signal line selecting transistors have a small resistance. 
     
     
       9. A nonvolatile semiconductor memory device according to claim  5 , wherein a common signal is applied to said bit line selecting transistors with respect to bit lines selected thereby. 
     
     
       10. A nonvolatile semiconductor memory device according to claim  1 , wherein said device comprises an electrically erasable programmable read only memory. 
     
     
       11. A nonvolatile semiconductor memory device according to claim  1 , wherein said reading signal line selecting transistors have a resistance which is lower than a resistance of said writing signal line selecting transistors. 
     
     
       12. A nonvolatile semiconductor memory device according to claim  1 , further comprising: 
       signal lines for transmitting signals to said plurality of memory elements;  
       a write circuit for supplying a writing potential to bit lines via said signal lines; and  
       a sense amplifier for supplying a read potential to bit lines via said signal lines.  
     
     
       13. A nonvolatile semiconductor memory device according to claim  2 , wherein said reading signal line selecting transistors and said writing signal line selecting transistors are selectively energized. 
     
     
       14. A nonvolatile semiconductor memory device according to claim  1 , wherein said memory elements comprise one of 4-bit memory elements, 8-bit memory elements and 16-bit memory elements. 
     
     
       15. A nonvolatile semiconductor memory device according to claim  1 , wherein said reading signal line selecting transistors comprise enhanced transistors with a high current drive capability. 
     
     
       16. A nonvolatile semiconductor memory device according to claim  5 , wherein said device comprises an electrically erasable programmable read only memory. 
     
     
       17. A nonvolatile semiconductor memory device according to claim  5 , wherein said reading signal line selecting transistors have a resistance which is lower than a resistance of said writing signal line selecting transistors. 
     
     
       18. A nonvolatile semiconductor memory device according to claim  5 , further comprising: 
       signal lines for transmitting signals to said plurality of memory elements;  
       a write circuit for supplying a writing potential to bit lines via said signal lines; and  
       a sense amplifier for supplying a read potential to bit lines via said signal lines.  
     
     
       19. A nonvolatile semiconductor memory device according to claim  6 , wherein said reading signal line selecting transistors and said writing signal line selecting transistors are selectively energized. 
     
     
       20. A nonvolatile semiconductor memory device according to claim  5 , wherein said memory elements comprise one of 4-bit memory elements, 8-bit memory elements and 16-bit memory elements.