Flip-flop circuit

Abstract

The present invention includes: a series circuit which has a negative differential resistance element and another negative differential resistance element that has a control terminal capable of controlling a value of an element current; a transfer gate; a latch circuit which has negative differential resistance elements connected in series; and an inverter circuit which has an FET as a drive element and a negative differential resistance element as a load element. With this, such a flip-flop can be obtained that when a clock signal is applied to a power supply terminal of the series circuit and a control terminal of the transfer gate and an input signal is supplied to the control terminal of the negative differential resistance element, an output is placed at a terminal.

What is claimed is:  
     
       1. A flip-flop circuit comprising: 
       a series circuit which has a first negative differential resistance element and a second negative differential resistance element in such a configuration that one end of said first negative differential resistance element and one end of said second negative differential resistance element are interconnected at a common series connection point, that said second negative differential resistance element has a control terminal for controlling a value of an element current, and that said series connection point acts as an output terminal;  
       clock supplying circuit for supplying a clock signal as an operating power supply for said series circuit;  
       a latch circuit;  
       a transfer gate which is disposed between an output terminal of said series circuit and said latch circuit and also which is turned ON and OFF by said clock signal; and  
       an inverter circuit which is connected to said latch circuit;  
       wherein an input signal is applied to said control terminal of said second negative differential resistance element, while an output of said inverter circuit is placed as an output signal.  
     
     
       2. The flip-flop circuit according to claim  1 , wherein said latch circuit comprises a third negative differential resistance element and a fourth negative differential resistance element which are connected in series between a reference potential and a power supply potential. 
     
     
       3. The flip-flop circuit according to claim  1  wherein said first negative differential resistance element is a resonant tunnel diode. 
     
     
       4. The flip-flop circuit according to claim  1 , wherein said second negative differential resistance element is a parallel-connected element consisting of a resonant tunnel diode and an FET element. 
     
     
       5. A flip-flop circuit comprising: 
       a series circuit which has a first negative differential resistance element and a second differential resistance element in such a configuration that one end of said first negative differential resistance element and one end of said second negative differential resistance element are interconnected at a common series connection point, that at least said first negative differential resistance element has a control terminal for controlling a value of an element current, and that said common series connection point acts as an output terminal;  
       clock supplying circuit for supplying a clock signal as an operating power supply for said series circuit;  
       a latch circuit;  
       a transfer gate which is disposed between an output terminal of said series circuit and said latch circuit and also which is turned ON and OFF by said clock signal; and  
       a buffer circuit which is connected to said latch circuit;  
       wherein an input signal is applied to said control terminal of said first negative differential resistance element and an output of said buffer circuit is placed as an output signal.  
     
     
       6. The flip-flop circuit according to claim  5 , wherein said latch circuit comprises a third negative differential resistance element and a fourth negative differential resistance element which are connected in series between a reference potential and a power supply potential. 
     
     
       7. The flip-flop circuit according to claim  5 , wherein said second negative differential resistance element is a resonant tunnel diode. 
     
     
       8. The flip-flop circuit according to claim  5 , wherein said first negative differential resistance element is a parallel-connected element consisting of a resonant tunnel diode and an FET element.