US6353346B1ExpiredUtility

Apparatus and method for a programmable adaptive output driver

92
Assignee: NAT SEMICONDUCTOR CORPPriority: Oct 6, 2000Filed: Oct 6, 2000Granted: Mar 5, 2002
Est. expiryOct 6, 2020(expired)· nominal 20-yr term from priority
Inventors:Wai Cheong Chan
H03K 3/3565H03K 19/018585H03K 19/00361H03K 17/167
92
PatentIndex Score
48
Cited by
9
References
18
Claims

Abstract

An adaptive output driver that uses a programmable Schmitt-trigger buffer to change the driver's operational response after it is manufactured. The adaptive output driver includes a primary driver that provides the primary current to drive an output signal into a load. A secondary driver for the adaptive output driver is enabled by the Schmitt-trigger buffer to provide an additional current to drive the load when the transitions between high and low states are slower than a predetermined slew rate. The programmable Schmitt-trigger buffer includes cells of pull-up and pull-down transistors that can be separately enabled. Each enabled cell causes an imbalance in the overall sizing ratio of activated pull-up and pull-down transistors; the amount of imbalance in the overall sizing ratio corresponds to the amount of hysteresis in the response of the Schmitt-trigger buffer. By programming the amount of hysteresis in the Schmitt-trigger buffer, the operation of the adaptive output driver can be modified to suit different loading conditions after manufacture. The programmable Schmitt-trigger buffer can be used in the input stage of an input/output driver employed with a microprocessor. Also, the programmable Schmitt-trigger buffer may be used with a distributed and weighted output driver to provide separate delays in the operation of selected output stages.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
       1. An apparatus for programming the strength of an output signal driving a load, comprising: 
       (a) an adaptive output driver that includes a primary driver and a secondary driver, the primary driver provides a primary current for driving the output signal into the load;  
       (b) a control circuit that enables the secondary driver to assist the primary driver, the enabled secondary driver provides an additional current that is added to the primary current to drive the output signal into the load when transition times between high and low states for the output signal are slower than a maximum slew rate; and  
       (c) a buffer for disabling the operation of the secondary driver, wherein a trip point for the buffer to disable the secondary driver is programmable so that the total amount of current provided by the adaptive output driver to drive the output signal into the load is adjustable to suit different output signal conditions.  
     
     
       2. The apparatus of  claim 1 , wherein the buffer includes at least one cell, each cell includes at least two pull-up transistors and at least two pull-down transistors. 
     
     
       3. The apparatus of  claim 2 , further comprising hysteresis in the response of the buffer, the hysteresis is related to an imbalance in the sizing ratio of each pull-up transistor and each pull-down transistor in each enabled cell and the hysteresis defines a value for the trip point where the buffer disables the operation of the secondary driver. 
     
     
       4. The apparatus of  claim 2 , further comprising a logic circuit that is coupled to the buffer and provides for selectively enabling one or more cells so that a position for the buffer's trip point is adjustable for different output signal conditions. 
     
     
       5. The apparatus of  claim 2 , wherein the pull-up transistors and pull-down transistors are CMOS transistors. 
     
     
       6. The apparatus of  claim 1 , wherein the buffer is a Schmitt-trigger buffer. 
     
     
       7. The apparatus of  claim 1 , wherein the control circuit employs one transistor to negate a logical state for each logic gate included in the control circuit so that the response time for the control circuit is reduced. 
     
     
       8. The apparatus of  claim 1 , wherein the control circuit provides short circuit protection for the adaptive output driver. 
     
     
       9. The apparatus of  claim 1 , wherein the control circuit includes a feedback circuit to monitor the slew rate of the transitions between the high and low states of the output signal. 
     
     
       10. The apparatus of  claim 1 , wherein the trip point includes a low trip point for transitions from the high state to the low state of the output signal and a high trip point for transitions from the low state to the high state of the output signal. 
     
     
       11. An apparatus for providing a delay in driving an input signal for an input stage of an input/output driver, comprising: 
       (a) a tri-state buffer for an output stage of the input/output driver, the tri-state buffer providing a current to drive an output signal into an output load;  
       (b) a Schmitt-trigger buffer in the input stage that provides a programmable delay in driving the input signal; and  
       (c) a logic circuit operatively coupled to the Schmitt-trigger buffer, the logic circuit enables the separate programming of the Schmitt-trigger buffer's delay so that the operation of the input stage of the input/output driver is adjustable for different input signal conditions.  
     
     
       12. The apparatus of  claim 11 , wherein the input/output driver is employed with an integrated circuit, including a microprocessor. 
     
     
       13. A method for programming the strength of an output signal driving a load, comprising: 
       (a) providing a primary current for driving the output signal into the load;  
       (b) providing a secondary current that is added to the primary current when transition times between high and low states for the output signal are slower than a maximum slew rate; and  
       (c) disabling the secondary current with a buffer, wherein a trip point for the buffer to disable the secondary driver is programmable so that the total amount of current provided by the output driver to drive the output signal into the load is adaptable to different output signal conditions.  
     
     
       14. The method of  claim 13 , further comprising selectively enabling pull-down transistors and pull-up transistors so that a position of the buffer's trip point is adjustable for different output signal conditions. 
     
     
       15. The method of  claim 13 , further comprising providing short circuit protection when driving the output signal into the load. 
     
     
       16. The method of  claim 13 , further comprising monitoring output signal feedback to determine the slew rate of the transitions between the high and low states of the output signal. 
     
     
       17. The method of  claim 13 , further comprising employing hysteresis of the buffer to define a position for the trip point where the buffer disables the secondary current. 
     
     
       18. An apparatus for programming the strength of an output signal driving a load, comprising: 
       (a) means for providing a primary driver and a secondary driver, the primary driver providing current for driving the output signal into the load;  
       (b) means for enabling the secondary driver to assist the primary driver, the enabled secondary driver provides an additional current that is added to the current provided by the primary driver to drive the output signal into the load when transition times between high and low states for the output signal are slower than a maximum slew rate; and  
       (c) means for enabling a buffer to disable the operation of the secondary driver to assist the primary driver to drive the output signal into the load, wherein the buffer's trip point for disabling the secondary driver is programmable so that the total amount of current provided by the output driver to drive the output signal into the load is adaptable to different loading conditions.

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