US6361392B2ExpiredUtilityA1

Extraction grid for field emission displays and method

55
Assignee: MICRON TECHNOLOGY INCPriority: Jul 29, 1998Filed: May 18, 2001Granted: Mar 26, 2002
Est. expiryJul 29, 2018(expired)· nominal 20-yr term from priority
H01J 3/022H01J 31/127
55
PatentIndex Score
2
Cited by
14
References
8
Claims

Abstract

A display apparatus includes a substrate and a plurality of emitters formed on the substrate. The apparatus also includes a dielectric layer formed on the substrate. The dielectric layer includes a plurality of openings each formed about one of the plurality of emitters. The dielectric layer and extraction grid together have a thickness, measured perpendicular to the substrate, similar to a height of the emitters above the substrate. The apparatus also includes an extraction grid formed on the dielectric layer. The extraction grid is formed substantially in a plane of tips of the plurality of emitters and includes openings each formed about and in close proximity to a tip of one of the plurality of emitters. The extraction grid includes germanium so that photons incident on exposed portions of the extraction grid are absorbed and are not transmitted to depletion regions associated with the emitters. This reduces distortion in operation of the display.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
       1. A method for making a field emission display baseplate, the method comprising: 
       forming a plurality of emitters on a substrate;  
       forming a dielectric layer on the substrate, the dielectric layer having a plurality of openings each of which surrounds a respective one of the emitters; and  
       forming a layer of germanium on the dielectric layer, the germanium layer having a plurality of openings each of which surrounds a respective one of the emitters.  
     
     
       2. The method of  claim 1  wherein: 
       forming a dielectric layer comprises forming a dielectric layer on the planar surface and the plurality of emitters; and  
       forming a conductive layer comprises:  
       forming a first layer including polysilicon on the dielectric layer;  
       forming a second layer including germanium on the first layer; and  
       forming a third layer including polysilicon on the second layer.  
     
     
       3. The method of  claim 1 , further comprising: 
       treating the dielectric layer and the conductive layer to remove at least those portions of the dielectric layer and the conductive layer directly above tips of the plurality of emitters to provide a plurality of openings in the conductive layer each concentric with a tip of one of the plurality of emitters; and  
       etching the dielectric layer to expose at least tips of the plurality of emitters.  
     
     
       4. The method of  claim 3  wherein the treating step comprises polishing the conductive layer and the dielectric layer via a chemical-mechanical polishing process. 
     
     
       5. The method of  claim 1 , further comprising placing a faceplate in a plane parallel to a plane of tips of the plurality of emitters, the faceplate comprising a cathodoluminescent layer formed on a transparent conductive layer in turn formed on a transparent insulator. 
     
     
       6. The method of  claim 1  wherein forming a plurality of emitters on a substrate includes forming a plurality of emitters on a substrate wherein each of the plurality of emitters forms a drain of a FET in an active display. 
     
     
       7. The method of  claim 1  wherein forming a layer of germanium includes forming a layer of polycrystalline germanium. 
     
     
       8. The method of  claim 1  wherein forming a layer of germanium

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