Solid state imaging device and manufacturing method thereof

Abstract

The film thickness of a second oxide film 105 is set to be larger than that of a first gate oxide film 103 in such a way that, when the identical voltage is applied to both of electrodes, the channel potentials under respective electrodes are ±0.2 V or less. The second gate oxide film 105 is formed by the CVD method and the like.

What is claimed is:  
     
       1. A solid state imaging device, comprising: 
       a semiconductor substrate of a first conductivity type;  
       a semiconductor region of a second conductivity type disposed in the semiconductor substrate;  
       a first charge transfer electrode formed on a portion of the semiconductor region;  
       a first gate insulating film disposed between the semiconductor region and the first charge transfer electrode;  
       a second gate insulating film disposed on a portion of the semiconductor region as well as on the first charge transfer electrode; and  
       a second charge transfer electrode formed on a portion of the second gate insulating film, wherein  
       a film thickness of the second gate insulating film is larger than a film thickness of the first gate insulating film.  
     
     
       2. A solid state imaging device as recited in  claim 1 , wherein the thickness of the gate insulating films are set such that the channel potential under the first charge transfer electrode and the channel potential under the second charge transfer electrode are approximately the same, when an identical voltage is applied to both of the charge transfer electrodes. 
     
     
       3. A solid state imaging device as recited in  claim 1 , wherein the thickness of the gate insulating films are set such that the difference between the channel potential under the first charge transfer electrode and the channel potential under the second charge transfer electrode is equal to ±0.2 V or less, when 0 V in voltage is applied to both of the charge transfer electrodes.