Method and apparatus for manufacturing an interconnect structure

Abstract

An interconnect structure, such as a flip-chip structure, including a base pad and a stud formed on the base pad and extending from the base pad is disclosed. The stud and base pad are formed to be continuous and of substantially the same electrically conductive base material. Typically, a solder structure is formed on the stud wherein the solder structure is exposed for subsequent reflow attachment to another structure. The present invention relates to packaging integrated circuits, more particularly to the structure and processing of a stud and bump without the standard under bump metallurgy.

What is claimed is:  
     
       1. A flip-chip structure comprising; 
       a semiconductor substrate including an electronic device formed thereon;  
       a base pad on the semiconductor substrate and electrically connected to the electronic device;  
       a barrier layer between the base pad and the semiconductor substrate; and  
       a stud formed on the base pad and extending from the base pad wherein the stud and base pad are formed to be continuous and of substantially the same electrically conductive base material.  
     
     
       2. The flip-chip structure of  claim 1 , further comprising: 
       a passivation layer on the semiconductor substrate wherein the passivation layer defines an opening over the base pad through which the stud is formed.  
     
     
       3. The flip-chip structure of  claim 2 , wherein the passivation layer includes edges defining said opening and wherein the passivation layer and the edges are covered by a resilient layer. 
     
     
       4. The flip-chip structure of  claim 3 , wherein the resilient layer is comprised of a polyimide. 
     
     
       5. The flip-chip structure of  claim 1 , wherein the stud is exposed for subsequent attachment to another structure. 
     
     
       6. The flip-chip structure of  claim 1 , further comprising: 
       a solder structure formed on the stud wherein said solder structure is exposed for subsequent reflow attachment to another structure.  
     
     
       7. The flip-chip structure of  claim 6 , wherein the solder structure is formed of an electrically conductive material selected from a group consisting of lead, tin, tin and lead, tin and silver, and tin, silver and copper. 
     
     
       8. The flip-chip structure of  claim 1 , wherein the electrically conductive base material is a metal. 
     
     
       9. The flip-chip structure of  claim 7 , wherein the metal is selected from a group consisting of copper, nickel and nickel vanadium. 
     
     
       10. A flip-chip structure comprising; 
       a semiconductor substrate including an electronic device formed thereon;  
       a base pad on the semiconductor substrate and electrically connected to the electronic device;  
       a barrier layer between the base pad and the semiconductor substrate;  
       a passivation layer on the semiconductor substrate wherein the passivation layer includes edges defining an opening over the base pad, and wherein the passivation layer and the edges are covered by a resilient layer;  
       a stud formed on the base pad through the opening and extending from the pad base wherein the stud and base pad are formed to be continuous and of substantially the same electrically conductive base material.  
     
     
       11. The flip-chip structure of  claim 10 , further comprising: 
       a solder structure formed on the stud wherein said solder structure is exposed for subsequent reflow attachment.