Burst access memory system

Abstract

A more efficient memory access is provided by providing fast access to words on the same physical row (wordline) in memory whether sequential or not, by, after issuance of an address, the detection of whether the current access is on the same physical memory row as the previous access and accordingly allows a different number of wait states, dependent on whether the access is on the same row or not.

In the claims:  
     
       1. A method of accessing a memory to provide fast access to words on the same row in memory comprising the steps of: 
       detecting whether the current address is on the same physical memory row as a previous address;  
       providing a counter of consecutive addresses in a row and detecting the presence of a first control signal that calls for the addresses from a counter for providing the incrementation of addresses from the counter and detecting the presence of a second control signal for providing random row address within a wordline from a host; and  
       generating a different number of wait states depending on whether the access is on the same or different row.  
     
     
       2. The method of  claim 1  wherein said detecting steps includes storing previous address bits and comparing the previous row address bits with the current row address bits. 
     
     
       3. The method of  claim 1  wherein the detecting step includes determining if a new preemptive access is on the same wordline before the previous address is completed.