US6452770B1ExpiredUtility

Power buss inhibit through data input/output lines

31
Assignee: LUCENT TECHNOLOGIES INCPriority: May 31, 2000Filed: May 31, 2000Granted: Sep 17, 2002
Est. expiryMay 31, 2020(expired)· nominal 20-yr term from priority
G11C 5/14
31
PatentIndex Score
1
Cited by
5
References
12
Claims

Abstract

In a CMOS integrated circuit card configuration operating upon a received data input stream and having a common power buss for the individual integrated circuits thereof, the invention comprises the connection of a power pin of all such individual integrated circuits directly to the power buss, except for the integrated circuit to which the data input stream is applied, wherein a diode of predetermined forward voltage drop is employed—having its anode connected to the power buss and its cathode connected to its associated power pin.

Claims

exact text as granted — not AI-modified
We claim:  
     
       1. The combination comprising: 
       a CMOS integrated circuit card configuration including a plurality of integrated circuits operating upon a received data input stream, with said card configuration having a common power buss for the individual integrated circuits of said plurality;  
       a plurality of short circuit connections between each power pin included on all individual integrated circuits of said card configuration and said power buss, except for one integrated circuit to which said data input stream is applied; and  
       a diode coupling the power pin of said one integrated circuit to said power buss, with the anode of said diode connected to said power buss and with the cathode of said diode being connected to said power pin of said one integrated circuit.  
     
     
       2. The combination of  claim 1 , wherein said diode exhibits a forward voltage drop to couple a voltage from said power buss to said one integrated circuit sufficient to operate transistors therein at their manufacturer recommended range of performance. 
     
     
       3. The combination of  claim 2 , wherein said diode is a Schottky diode having an anode connected to said power buss and a cathode connected to said power pin of said one integrated circuit. 
     
     
       4. The combination of  claim 3 , wherein all power pins of all individual integrated circuits are initially connected by short circuit connections to said power buss, wherein at least one decoupling capacitor is coupled to said power buss, and wherein the short circuit connection between the power pin and the power buss of said one integrated circuit receiving said data input stream is thereafter broken, with said Schottky diode being added in place of said broken connection with the anode connected to said one decoupling capacitor. 
     
     
       5. The combination of  claim 2 , wherein said CMOS integrated circuit card configuration contains said plurality of individual integrated circuits thereon, each of said integrated circuits including a diode having an anode connected to said power buss and a cathode connected to each individual integrated circuit, and each individual integrated circuit including a switch coupled across the diode thereof for the short circuit connection, said one integrated circuit having its switch open circuited thereby receiving the input data. 
     
     
       6. The combination of  claim 5 , wherein each such switch includes a fuseable link burnable to an open circuit condition. 
     
     
       7. The combination of  claim 3 , wherein said Schottky diode exhibits a forward voltage drop of the order of 0.3 volts. 
     
     
       8. The combination of  claim 3 , wherein said power buss supplies a voltage of the order of 5 volts and wherein said Schottky diode exhibits a forward voltage drop of the order of 0.3 volts. 
     
     
       9. A CMOS integrated circuit card configuration having a common power buss and operating upon a received data input stream comprising: 
       a plurality of individual integrated circuits on said card configuration, to one of which said data input stream is applied; and  
       a direct connection from each power pin of all but one of such individual integrated circuits directly to said power buss;  
       said one individual integrated circuit being said integrated circuit to which said received data input stream is applied; and  
       a diode having an anode connected to said power buss and a cathode connected to the power pin associated with said one individual integrated circuit.  
     
     
       10. The CMOS integrated circuit card configuration of  claim 9  wherein said diode exhibits a forward voltage drop to couple a voltage from said power buss to said individual integrated circuit sufficient to operate transistors therein at their manufacturer recommended range of performance. 
     
     
       11. The CMOS integrated circuit card configuration of  claim 10  wherein said diode is a Schottky diode exhibiting a forward voltage drop of the order of 0.3 volts. 
     
     
       12. The CMOS integrated circuit card configuration of  claim 9  wherein said power buss supplies a voltage of the order of 5 volts and wherein said diode is a Schottky diode exhibiting a forward voltage drop of the order of 0.3 volts.

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