US6496412B1ExpiredUtility
Nonvolatile semiconductor memory device for storing multivalued data
Est. expirySep 20, 2019(expired)· nominal 20-yr term from priority
G11C 11/5628G11C 11/5642G11C 16/26G11C 16/0483G11C 2211/5621G11C 16/10G11C 11/5621G11C 2211/5642G11C 16/02
93
PatentIndex Score
57
Cited by
11
References
7
Claims
Abstract
A multivalued memory has data of state “0”, state “1”, state “2”, and state “3” whose threshold voltages increase in that order. In a first-page write operation, a memory cell whose data is in state “0” is brought into state “1”. In a second-page write operation, a memory cell whose data is in state “0” is brought into state “3” and a memory cell whose data is in state “1” is brought into state “2”. As a result, in reading the data, the data on the first page can be read in two read operations. Furthermore, the operation of writing the data onto the second page can be made faster, because a high initial write voltage can be used.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A method for programming a semiconductor memory device comprising:
loading a second data to a first latch circuit when data of a memory cell has been changed according to a first data;
loading the first data readout from the memory cell to a second latch circuit;
writing the second data latched in the first latch circuit to the memory cell;
verifying data read from the memory cell to check whether data set to state “1” according to the first data has reached state “2” according to the second data; and
verifying data read from the memory cell to check whether data set to state “0” according to the first data has reached state “3” according to the second data.
2. The method according to claim 1 , further comprising:
loading the first data to the first latch circuit;
writing the first data to the memory cell; and
verifying whether data read from the memory cell has reached state “1” or still “0”,
wherein said loading the first data, writing the first data and said verifying being executed prior to loading the second data to the first latch circuit.
3. The method according to claim 2 , wherein said verifying the data comprises reading data from the memory cell by a first potential which is higher than a potential of a read operation.
4. A method for programming a semiconductor memory device comprising:
loading a first data to a first latch circuit;
writing the first data to a memory cell;
firstly verifying whether data read from the memory cell has reached state “1” or still state “0”;
loading a second data to the first latch circuit when the data read from the memory cell has changed according to the first data;
loading the first data readout from the memory cell to a second latch circuit;
writing the second data to the memory cell;
secondly verifying data read from the memory cell to check whether data set to state “1” according to the first data has reached state “2”; and
thirdly verifying data read from the memory cell to check whether data set to state “0” according to the first data has reached state “3”.
5. The method according to claim 4 , wherein said firstly verifying data comprises reading data from the memory cell by a first potential which is higher than a potential when reading data corresponding to state “1”.
6. The method according to claim 4 , wherein said secondly verifying data comprises reading data from the memory cell by a second potential which is higher than a potential when reading data corresponding to state “2”.
7. The method according to claim 4 , wherein said thirdly verifying data comprises reading data from the memory cell by a third potential which is higher than a potential when reading data corresponding to state “3”.Cited by (0)
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