Semiconductor memory device

Abstract

A semiconductor memory device is constituted by forming two types of insulation films on the channel of an MOS transistor on which a vertical type another MOS transistor using the control gate of the MOS transistor as a substrate is stacked. Thus, a non-volatile semiconductor memory device small in size, having high reliability, high density, excellent fatigue and a random access function can be provided.

What is claimed is:  
     
       1. A semiconductor memory device, comprising: 
       a first insulation film on a semiconductor substrate;  
       a second insulation film on the first insulation film;  
       a second MOS (Metal Oxide Semiconductor) transistor in which a channel current flows in the vertical direction to a surface of the second insulation film by being controlled by a word line, and  
       a write data line electrode as a write data line;  
       wherein the first insulation film, the second insulation film, the second MOS transistor and the write data line electrode are stacked orderly on a channel of a first MOS (Metal Oxide Semiconductor) transistor formed on the semiconductor substrate;  
       wherein charges are injected from the write data line by way of a channel of the second MOS transistor into the second insulation film, and the charges are stored in a storage node comprising either charge traps in the second insulation film or an interface between the first insulation film and the second insulation film to thereby hold information and with the information being detected by a change of a current due to a change of a threshold voltage of the first MOS transistor; and  
       wherein a charge injection is performed by flows of electrons and holes caused by tunneling between the first MOS transistor which is controlled by a read data line and the second MOS transistor which is controlled by the write data line and the word line.  
     
     
       2. The semiconductor memory device according to  claim 1 , wherein an electrode of the word line is disposed respectively on both sides of the channel of the second MOS transistor. 
     
     
       3. A semiconductor memory device, comprising: 
       a first insulation film on a semiconductor substrate;  
       a conductive layer on the first insulation film;  
       a second insulation film on the conductive layer;  
       a second MOS (Metal Oxide Semiconductor) transistor in which a channel current flows in the vertical direction by being controlled by a word line; and  
       a write data line electrode as a write data line;  
       wherein the first insulation film, the conductive layer, the second insulation film, the second MOS transistor and the write data line electrode are stacked orderly on a channel of a first MOS (Metal Oxide Semiconductor) transistor formed on the semiconductor substrate;  
       wherein charges are injected from the write data line by way of a channel of the second MOS transistor to the conductive layer in a direction vertical to the semiconductor substrate, with the charges being stored in the conductive layer to thereby hold information and with the information being detected by a change of a current due to a change of a threshold voltage of the first MOS transistor; and  
       wherein a charge injection is performed by flows of electrons and holes caused by tunneling between the first MOS transistor which is controlled by a read data line and the second MOS transistor which is controlled by the write data line and the word line.  
     
     
       4. The semiconductor memory device according to  claim 1 , wherein a barrier height of the second insulation film is lower than a barrier height of the first insulation film. 
     
     
       5. The semiconductor memory device according to  claim 2 , wherein a barrier height of the second insulation film is lower than a barrier height of the first insulation film. 
     
     
       6. The semiconductor memory device according to  claim 3 , wherein a barrier height of the second insulation film is lower than a barrier height of the first insulation film. 
     
     
       7. A semiconductor memory device, comprising: 
       a first insulation film on a semiconductor substrate;  
       a second insulation film on the first insulation film;  
       a second MOS (Metal Oxide Semiconductor) transistor in which a channel current flows in the vertical direction by being controlled by a word line; and  
       a write data line electrode as a write data line;  
       wherein the first insulation film, the second insulation film, the second MOS transistor and the write data line electrode are stacked orderly on a channel of a first MOS (Metal Oxide Semiconductor) transistor formed on the semiconductor substrate;  
       wherein charges are injected from the write data line by way of a channel of the second MOS transistor to the second insulation film in a direction vertical to the semiconductor substrate, with the charges being trapped and stored in the second insulation film to thereby hold information and with the information being detected by a change of a current due to a change of a threshold voltage of the first MOS transistor; and  
       wherein a charge injection is performed by flows of electrons and holes caused by tunneling between the first MOS transistor which is controlled by a read data line and the second MOS transistor which is controlled by the write data line and the word line.  
     
     
       8. The semiconductor memory device according to  claim 7 , wherein a barrier height of the second insulation film is lower than a barrier height of the first insulation film.