US6514849B1ExpiredUtility

Method of forming smaller contact size using a spacer hard mask

98
Assignee: ADVANCED MICRO DEVICES INCPriority: Apr 2, 2001Filed: Apr 2, 2001Granted: Feb 4, 2003
Est. expiryApr 2, 2021(expired)· nominal 20-yr term from priority
H10P 50/73
98
PatentIndex Score
297
Cited by
1
References
13
Claims

Abstract

An exemplary method of forming contact holes includes providing a photoresist pattern over an anti-reflective coating (ARC) layer where the ARC layer is deposited over a layer of material; etching the ARC layer according to the photoresist pattern to form ARC features; forming spacers on lateral sides of the ARC features; and etching trench lines using the spacers and ARC features as hard mask to define portions of the layer of material which are etched.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
       1. A method of forming a contact in an integrated circuit comprising: 
       providing a photoresist pattern over an anti-reflective coating (ARC) layer, the ARC layer being deposited over a layer of material;  
       etching the ARC layer according to the photoresist pattern to form ARC features;  
       forming spacers on lateral sides of the ARC features; and  
       etching a contact hole using the spacers and ARC features as hard mask to define portions of the layer of material which are etched.  
     
     
       2. The method of  claim 1 , wherein the step of forming spacers comprises adjusting etch chemistry to form spacers with tails. 
     
     
       3. The method of  claim 2 , wherein the tails are 50-100 Angstroms in width. 
     
     
       4. The method of  claim 1 , wherein the step of forming spacers comprises adjusting etch chemistry to form spacers without tails. 
     
     
       5. The method of  claim 1 , wherein the trench lines have a width of 1600-2500 Angstroms. 
     
     
       6. The method of  claim 1 , further comprising stripping the photoresist pattern. 
     
     
       7. The method of  claim 1 , wherein the step of forming spacers comprises controlling the shape of the formed spacer. 
     
     
       8. A method of manufacturing an integrated circuit comprising: 
       patterning mask features on an anti-reflective coating (ARC) layer, the mask features being separated by a first distance defined as a first critical dimension;  
       transferring the patterned mask features to the ARC layer to form ARC features;  
       depositing a layer of spacer material over the ARC features;  
       etching the layer of spacer material to form spacers on lateral sides of the ARC features, the spacers and ARC features defining re-structured ARC features, the re-structured ARC features being separated by a second distance defined as a second critical dimension, the second critical dimension being less than the first critical dimension; and  
       etching contact holes using re-structured ARC features as a hard mask.  
     
     
       9. The method of  claim 8 , further comprising adjusting spacer etch chemistry to form spacers with tails. 
     
     
       10. The method of  claim 8 , wherein ARC layer is any one of SiON, SiN, and SiRN. 
     
     
       11. The method of  claim 8 , wherein the layer of spacer material is any one of SiON, SiN, and SiRN. 
     
     
       12. The method of  claim 8 , wherein the ARC layer is deposited over a layer of oxide. 
     
     
       13. The method of  claim 8 , wherein the ARC layer is 300-1000 Angstroms thick.

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