P
US6521118B1ExpiredUtilityPatentIndex 90

Semiconductor etching process and apparatus

Assignee: TECHNION RES & DEV FOUNDATIONPriority: Jan 14, 1998Filed: Jan 6, 1999Granted: Feb 18, 2003
Est. expiryJan 14, 2018(expired)· nominal 20-yr term from priority
Inventors:STAROSVETSKY DAVIDKOVLER MARKYAHALOM JOSEPHNEMIROVSKY YAEL
H10P 50/617H10P 50/613C25F 7/00C25F 3/12
90
PatentIndex Score
26
Cited by
6
References
68
Claims

Abstract

There is provided a process for etching a semiconductor material, comprising the steps of: providing an electrochemical cell containing an etching electrolyte, the etching electrolyte being selected from the group of acidic electrolyte solutions, alkaline solutions, neutral solutions, and molten electrolytes; immersing the semiconductor material in the etching electrolyte, whereby at least one surface of the semiconductor material contacts the etching electrolyte; thereafter negatively biasing the semiconductor material; and while continuing to negatively bias the semiconductor material, illuminating at least part of the at least one surface of the semiconductor material which contacts the etching electrolyte with light selected from the group of ultraviolet, visible, and infrared light. There is also provided an apparatus for effecting the process of the invention, as well as semiconductor materials so etched.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
       1. A process for etching a semiconductor material, comprising the steps of: 
       (a) providing an electrochemical cell containing an etching electrolyte, said etching electrolyte being selected from the group consisting of acidic electrolyte solutions, alkaline solutions, neutral solutions, and molten electrolytes;  
       (b) immersing said semiconductor material in said etching electrolyte, wherein at least one surface of said semiconductor material contacts said etching electrolyte, thereby defining an open circuit;  
       (c) after step (b), negatively biasing said semiconductor material to a potential at least one volt more negative than that of the open circuit; and  
       (d) while continuing to negatively bias said semiconductor material, illuminating at least part of said at least one surface of the semiconductor material which contacts said etching electrolyte with light selected from the group consisting of ultraviolet, visible, and infrared light.  
     
     
       2. A process according to  claim 1  wherein step (b) comprises immersing said semiconductor material in the etching electrolyte until the open circuit potential of said semiconductor material reaches a steady state value. 
     
     
       3. A process according to  claim 2 , wherein said etching electrolyte is a strong alkaline solution. 
     
     
       4. A process according to  claim 3 , wherein said strong alkaline solution is a KOH solution. 
     
     
       5. A process according to  claim 1 , wherein step (b) comprises immersing said semiconductor material in said etching electrolyte until the open circuit potential of said semiconductor material reaches a value of about minus 1.1 V or a value more negative than minus 1.1 V, with respect to a Standard Calomel Electrode (SCE). 
     
     
       6. A process according to  claim 5 , wherein step (b) comprises immersing said semiconductor material in said etching electrolyte until the open circuit potential of said semiconductor material reaches a value of from about minus 1.1 V to about minus 1.5 V (SCE). 
     
     
       7. A process according to  claim 5 , wherein said etching electrolyte is a strong alkaline solution. 
     
     
       8. A process according to  claim 7 , wherein said alkaline solution is a KOH solution. 
     
     
       9. A process according to  claim 1 , wherein step (c) comprises negatively biasing said semiconductor material until the potential reaches a value of about minus 5 volts (SCE) or a value more negative than minus 5 volts (SCE). 
     
     
       10. A process according to  claim 9 , wherein step (d) comprises illuminating the semiconductor material with light selected from the group consisting of ultraviolet, visible, and infrared light while continuing to negatively bias said semiconductor material to a potential of about minus 5 volts (SCE) or a value more negative than minus 5 volts (SCE). 
     
     
       11. A process according to  claim 1 , comprising the steps of: 
       immersing said semiconductor material in said etching electrolyte, wherein at least one surface of said semiconductor material contacts said etching electrolyte, until the open circuit potential of said semiconductor material reaches a steady state value;  
       after the preceding step, negatively biasing said semiconductor material until the potential reaches minus 5 volts or more negative than minus 5 volts (SCE); and  
       while negatively biasing said semiconductor material to a potential of minus 5 volts or more negative than minus 5 volts (SCE), illuminating at least part of said at least one surface of the semiconductor material which contacts said etching electrolyte with light selected from the group consisting of ultraviolet, visible, and infrared light.  
     
     
       12. A process according to  claim 1 , comprising the steps of: 
       immersing said semiconductor material in said etching electrolyte, wherein at least one surface of said semiconductor material contacts said etching electrolyte, until the open circuit potential of said semiconductor material reaches from about minus 1.1 V or more negative than minus 1.1 V (SCE);  
       after the preceding step, negatively biasing said semiconductor material until the potential reaches minus 5 volts or more negative than minus 5 volts (SCE); and  
       while negatively biasing said semiconductor material to a potential of minus 5 volts or more negative than minus 5 volts (SCE), illuminating at least part of said at least one surface of the semiconductor material which contacts said etching electrolyte with light selected from the group consisting of ultraviolet, visible, and infrared light.  
     
     
       13. A process according to  claim 1 , wherein said semiconductor material is selected from the group consisting of the III-V and II-VI groups of semiconductors. 
     
     
       14. A process according to  claim 1 , wherein said semiconductor material is selected from the group consisting of silicon, germanium, gallium arsenide, and cadmium telluride. 
     
     
       15. A process according to  claim 14 , wherein said semiconductor material is p-type silicon or n-type silicon. 
     
     
       16. A process according to  claim 1 , wherein said etching electrolyte is an electrolyte which is a solution containing a solute selected from the group consisting of alkali hydroxides, alkali halogenides and hydrogen halogenide acids. 
     
     
       17. A process according to  claim 16 , wherein said solution is an aqueous solution. 
     
     
       18. A process according to  claim 17 , wherein said solute is selected from the group consisting of KOH, NaOH, NaCl, and HF. 
     
     
       19. A process according to  claim 16 , wherein said solution is a non-aqueous solution. 
     
     
       20. A process according to  claim 19 , wherein said non-aqueous solution is an alcoholic solution. 
     
     
       21. A process according to  claim 1 , wherein said etching electrolyte is a neutral aqueous solution which is not harmful to laboratory or industrial equipment, and is not harmful to the touch. 
     
     
       22. A process according to  claim 1 , wherein said etching electrolyte is a molten electrolyte. 
     
     
       23. A process according to  claim 22 , wherein said molten electrolyte is a molten salt. 
     
     
       24. A process according to  claim 1 , wherein a partly masked semiconductor material is illuminated with light having a wavelength of between about 250 and about 1500 nm. 
     
     
       25. A process according to  claim 24 , wherein source of the illuminating light is a tungsten-halogen bulb. 
     
     
       26. A process according to  claim 24 , wherein the source of the illuminating light is a dye laser. 
     
     
       27. A process according to  claim 1 , wherein a partly masked semiconductor material is illuminated with light of an intensity of at least 0.01 W/cm 2 . 
     
     
       28. A process according to  claim 1 , wherein said etching electrolyte is a solution at a temperature between its freezing point and its boiling point. 
     
     
       29. A process according to  claim 28 , wherein said solution is an aqueous solution. 
     
     
       30. A process according to  claim 29 , wherein the temperature is between about 25° C. and about 90° C. 
     
     
       31. A process according to  claim 30 , wherein the temperature is between about 50° C. and about 90° C. 
     
     
       32. A process according to  claim 28 , wherein said solution is a non-aqueous solution. 
     
     
       33. A process according to  claim 32 , wherein said non-aqueous solution is an alcoholic solution. 
     
     
       34. A process according to  claim 1 , comprising the steps of: 
       (i) masking and patterning said semiconductor material with a masking material, said masking material being an electrically insulating material which is less susceptible to the etching electrolyte than is the semiconductor material, thereby to provide a masked semiconductor material having at least one masked surface and at least one exposed surface;  
       (ii) immersing said masked semiconductor material in said etching electrolyte, wherein at least one of said at least one exposed surfaces of said masked semiconductor material contacts said etching electrolyte;  
       (iii) after the preceding step, negatively biasing said masked semiconductor material until the potential reaches a negative voltage value; and  
       (iv) while negatively biasing said masked semiconductor material, illuminating at least part of said at least one exposed surface of said masked semiconductor material which contacts said etching electrolyte with light selected from the group consisting of ultraviolet, visible, and infrared light.  
     
     
       35. A process according to  claim 34 , wherein step (i) comprises masking and patterning said semiconductor material with a masking material which is inert to said etching electrolyte. 
     
     
       36. A process according to  claim 34  wherein step (ii) comprises immersing said masked semiconductor material in the etching electrolyte until the open circuit potential of said semiconductor material reaches a steady state value. 
     
     
       37. A process according to  claim 36 , wherein said etching electrolyte is a strong alkaline solution. 
     
     
       38. A process according to  claim 37 , wherein said strong alkaline solution is a KOH solution. 
     
     
       39. A process according to  claim 34 , wherein step (ii) comprises immersing said masked semiconductor material in said etching electrolyte until the open circuit potential of said masked semiconductor material reaches about minus 1.1 V or more negative than minus 1.1 V, with respect to a Standard Calomel Electrode (SCE). 
     
     
       40. A process according to  claim 39 , wherein step (ii) comprises immersing said masked semiconductor material in said etching electrolyte until the open circuit potential of said masked semiconductor material reaches a value of from about minus 1.1 V to about minus 1.5 V (SCE). 
     
     
       41. A process according to  claim 39 , wherein said etching electrolyte is a strong alkaline solution. 
     
     
       42. A process according to  claim 41 , wherein said strong alkaline solution is a KOH solution. 
     
     
       43. A process according to  claim 34 , wherein step (iii) comprises negatively biasing said masked semiconductor material until the potential reaches about minus 5 volts (SCE) or more negative than minus 5 volts (SCE). 
     
     
       44. A process according to  claim 43 , wherein step (iv) comprises illuminating the semiconductor material with light selected from the group consisting of ultraviolet, visible, and infrared light while continuing to negatively bias said semiconductor material to a potential of about minus 5 volts (SCE) or more negative than minus 5 volts (SCE). 
     
     
       45. A process according to  claim 34  comprising the steps of: 
       masking and patterning said semiconductor material with a masking material which is inert to said etching solution, thereby to provide a masked semiconductor material having at least one masked surface and at least one exposed surface;  
       immersing said masked semiconductor material in said etching electrolyte, wherein at least one of said at least one exposed surfaces of said masked semiconductor material contacts said etching electrolyte, until the open circuit potential of said masked semiconductor material reaches a steady state value;  
       after the preceding step, negatively biasing said masked semiconductor material until the potential reaches minus 5 volts or more negative than minus 5 volts (SCE); and  
       while negatively biasing said masked semiconductor material to a potential of minus 5 volts or more negative than minus 5 volts (SCE), illuminating at least part of said at least one exposed surface of said masked semiconductor material which contacts said etching electrolyte with light selected from the group consisting of ultraviolet, visible, and infrared light.  
     
     
       46. A process according to  claim 34 , comprising the steps of: 
       masking and patterning said semiconductor material with a masking material which is inert to said etching solution, thereby to provide a masked semiconductor material having at least one masked surface and at least one exposed surface;  
       immersing said masked semiconductor material in said etching electrolyte, wherein at least one of said at least one exposed surfaces of said masked semiconductor material contacts said etching electrolyte, until the open circuit potential of said masked semiconductor material reaches from about minus 1.1 V or more negative than minus 1.1 V (SCE);  
       after the preceding step, negatively biasing said masked semiconductor material until the potential reaches minus 5 volts or more negative than minus 5 volts (SCE); and  
       while continuing to negatively bias said masked semiconductor material to a potential of minus 5 volts or more negative than minus 5 volts (SCE), illuminating at least part of said at least one exposed surface of said masked semiconductor material which contacts said etching electrolyte with light selected from the group consisting of ultraviolet, visible, and infrared light.  
     
     
       47. A process according to  claim 34 , wherein said semiconductor material is selected from the group consisting of the III-V and II-VI groups of semiconductors. 
     
     
       48. A process according to  claim 34 , wherein said semiconductor material is selected from the group consisting of silicon, germanium, gallium arsenide, and cadmium telluride. 
     
     
       49. A process according to  claim 34 , wherein said etching electrolyte is an a solution containing a solute selected from the group consisting of alkali hydroxides, alkali halogenides and hydrogen halogenide acids. 
     
     
       50. A process according to  claim 49 , wherein said solution is an aqueous solution. 
     
     
       51. A process according to  claim 49 , wherein said solution is a non-aqueous solution. 
     
     
       52. A process according to  claim 51 , wherein said non-aqueous solution is an alcoholic solution. 
     
     
       53. A process according to  claim 49 , wherein said solute is selected from the group consisting of KOH, NaOH, NaCl, and HF. 
     
     
       54. A process according to  claim 34 , wherein said etching electrolyte is a neutral aqueous solution which is not harmful to laboratory or industrial equipment, and is not harmful to the touch. 
     
     
       55. A process according to  claim 34 , wherein said etching electrolyte is a molten electrolyte. 
     
     
       56. A process according to  claim 55 , wherein said molten electrolyte is a molten salt. 
     
     
       57. A process according to  claim 34 , wherein said masked semiconductor material is illuminated with light having a wavelength of between about 250 and about 1500 nm. 
     
     
       58. A process according to  claim 57 , wherein source of the illuminating light is a tungsten-halogen bulb. 
     
     
       59. A process according to  claim 57 , wherein the source of the illuminating light is a dye laser. 
     
     
       60. A process according to  claim 34 , wherein said masked semiconductor material is illuminated with light of an intensity of at least 0.01 W/cm2. 
     
     
       61. A process according to  claim 34 , wherein said etching electrolyte is an a solution at a temperature between its freezing point and its boiling point. 
     
     
       62. A process according to  claim 61 , wherein said solution is an aqueous solution. 
     
     
       63. A process according to  claim 62 , wherein the temperature is between about 25° C. and about 90° C. 
     
     
       64. A process according to  claim 63 , wherein the temperature is between about 50° C. and about 90° C. 
     
     
       65. A process according to  claim 61 , wherein said solution is a non-aqueous solution. 
     
     
       66. A process according to  claim 65 , wherein said non-aqueous solution is an alcoholic solution. 
     
     
       67. An etched semiconductor material, etched by the process of: 
       (a) providing a semiconductor material;  
       (b) providing an electrochemical cell containing an etching electrolyte, said etching electrolyte being selected from the group consisting of acidic electrolyte solutions, alkaline solutions, neutral solutions, and molten electrolytes;  
       (c) immersing said semiconductor material in said etching electrolyte, thereby to present at least one exposed surface of the semiconductor material to said etching electrolyte, thereby defining an open circuit;  
       (d) after step (c), negatively biasing said semiconductor material to a potential at least one volt more negative than that of the open circuit; and  
       (e) while continuing to negatively bias said semiconductor material, illuminating at least part of said at least one exposed surface of said semiconductor material with light selected from the group consisting of ultraviolet, visible, and infrared light.  
     
     
       68. A process for etching a semiconductor material formed of a single substance, comprising the steps of: 
       (a) providing an electrochemical cell containing an etching electrolyte, said etching electrolyte being selected from the group consisting of acidic electrolyte solutions, alkaline solutions, neutral solutions, and molten electrolytes;  
       (b) immersing said semiconductor material formed of a single substance in said etching electrolyte, wherein at least one surface of said semiconductor material formed of a single substance contacts said etching electrolyte, thereby defining an open circuit;  
       (c) after step (b), negatively biasing said semiconductor material formed of a single substance to a potential more negative than that of the open circuit; and  
       (d) while continuing to negatively bias said semiconductor material formed of a single substance, illuminating at least part of said at least one surface of the semiconductor material formed of a single substance which contacts said etching electrolyte with light selected from the group consisting of ultraviolet, visible, and infrared light.

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