Nonvolatile semiconductor memory system with capability of starting a new program operation while an existing program operation is being performed

Abstract

Disclosed is a nonvolatile memory system including at least one nonvolatile memory each having a plurality of nonvolatile memory cells and a buffer memory; and a control device coupled to the nonvolatile memory. The control device is enabled to receive external data and to apply the data to the nonvolatile memory, and the nonvolatile memory is enabled to operate a program operation including storing the received data to the buffer memory and storing the data held in the buffer memory to ones of nonvolatile memory cells. Moreover, the control device is enabled to receive external data while the nonvolatile memory is operating in the program operation. Also, the buffer memory is capable of receiving a unit of data, equal to the data length of data to be stored at one time of the program operation, the data length being more than 1 byte.

What is claimed is:  
     
       1. A nonvolatile memory system comprising: 
       a nonvolatile memory including a plurality of nonvolatile memory cells and a buffer memory; and  
       a control device coupled to said nonvolatile memory,  
       wherein said control device is enabled to receive data from outside of said nonvolatile memory system and to apply said data to said nonvolatile memory,  
       wherein said nonvolatile memory is enabled to operate a program operation,  
       wherein in said program operation, said nonvolatile memory receives said data from said control device, stores said data to said buffer memory and stores said data in said buffer memory to ones of said nonvolatile memory cells,  
       wherein said control device is enabled to receive data from outside of said nonvolatile memory system, while said nonvolatile memory is operating in said program operation, and  
       wherein said buffer memory has a data storing capacity enabling the receiving of a unit of data of a length equal to the data length of said data to be stored at one time of said program operation, said data length being more than 1 byte.  
     
     
       2. A nonvolatile memory system according to  claim 1 , 
       wherein said nonvolatile memory constitutes a first nonvolatile memory in said system which comprises plural ones of said nonvolatile memory, and  
       wherein a second nonvolatile memory of said plural nonvolatile memories in said system is enabled to receive said data received by said control device and to start storing the received data, while said first nonvolatile memory is operating in said program operation.  
     
     
       3. A nonvolatile memory system according to  claim 2 , 
       wherein each of the nonvolatile memories further includes a plurality of word lines and a plurality of data lines, and  
       wherein each of said nonvolatile memory cells in each of said nonvolatile memories is arranged at a crossing point of a corresponding one of said word lines and a corresponding one of said data lines and is coupled to the corresponding word line and corresponding data line.  
     
     
       4. A nonvolatile memory system according to  claim 3 , 
       wherein each of said nonvolatile memories includes a plurality of sectors each comprising one word line and ones of the nonvolatile memory cells coupled thereto, and  
       wherein said buffer memory has a data storing capacity enabling the receiving of a unit of data of a length equal to the data storing capacity and enabling the storing of a unit of data in said sector.  
     
     
       5. A nonvolatile memory system according to  claim 4 , 
       wherein each of said nonvolatile memories is a flash memory.  
     
     
       6. A nonvolatile memory system according to  claim 5 , 
       wherein said control device includes a host interface comprised of a data bus transceiver, an address bus driver, an address decoder and a control bus controller, to enable communication between the nonvolatile memories and an external system bus.  
     
     
       7. A nonvolatile memory system according to  claim 2 , 
       wherein said control device includes a host interface comprised of a data bus transceiver, an address bus driver, an address decoder and a control bus controller, to enable communication between the nonvolatile memories and an external system bus.  
     
     
       8. A nonvolatile memory system according to  claim 1 , 
       wherein said nonvolatile memory includes a plurality of word lines and a plurality of data lines, and  
       wherein each of said nonvolatile memory cells is arranged at a crossing point of a corresponding one of said word lines and a corresponding one of said data lines and is coupled to the corresponding word line and corresponding data line.  
     
     
       9. A nonvolatile memory system according to  claim 8 , 
       wherein said nonvolatile memory includes a plurality of sectors each comprising one word line and ones of the nonvolatile memory cells coupled thereto, and  
       wherein said buffer memory has a data storing capacity enabling the receiving of a unit of data of a length equal to the data storing capacity and enabling the storing of a unit of data in said sector.  
     
     
       10. A nonvolatile memory system according to  claim 9 , 
       wherein said nonvolatile memory is a flash memory.  
     
     
       11. A nonvolatile memory system according to  claim 1 , 
       wherein said control device includes a host interface comprised of a data bus transceiver, an address bus driver, an address decoder and a control bus controller, to enable communication between the nonvolatile memory and an external system bus.  
     
     
       12. A nonvolatile memory system comprising: 
       a plurality of nonvolatile memories each including a plurality of nonvolatile memory cells and a buffer memory; and  
       a control device coupled to said nonvolatile memories,  
       wherein said control device is enabled to receive data from outside of said nonvolatile memory system and to apply said data to said nonvolatile memories,  
       wherein said nonvolatile memories are enabled to operate a program operation,  
       wherein in said program operation, each of said nonvolatile memories selectively receives said data from said control device, stores said data to said buffer memory thereof and stores said data in said buffer memory to ones of said nonvolatile memory cells of that nonvolatile memory,  
       wherein said control device is enabled to receive data from outside of said nonvolatile memory system, while said nonvolatile memories are operating in said program operation, and  
       wherein said buffer memory has a data storing capacity enabling the receiving of a unit of data of a length equal to the data length of said data to be stored at one time of said program operation, said data length being more than 1 byte.  
     
     
       13. A nonvolatile memory system according to  claim 12 , 
       wherein a second one of said nonvolatile memories is enabled to receive said data received by said control device and to start storing the received data, while a first one of said nonvolatile memories is operating in said program operation.  
     
     
       14. A nonvolatile memory system according to  claim 13 , 
       wherein each of said nonvolatile memories further includes a plurality of word lines and a plurality of data lines, and  
       wherein each of said nonvolatile memory cells in each of the nonvolatile memories is arranged at a crossing point of a corresponding one of said word lines and a corresponding one of said data lines and is coupled to said corresponding word line and corresponding data line.  
     
     
       15. A nonvolatile memory system according to  claim 14 , 
       wherein each of said nonvolatile memories includes a plurality of sectors each comprising one word line and ones of the nonvolatile memory cells coupled thereto, and  
       wherein said buffer memory has a data storing capacity for receiving data in units of a sector and enabling the storing of a unit of data in said sector.  
     
     
       16. A nonvolatile memory system accordance to  claim 15 , 
       wherein each of said nonvolatile memories is a flash memory.  
     
     
       17. A nonvolatile memory system according to  claim 16 , 
       wherein said control device includes a host interface comprised of a data bus transceiver, an address bus driver, an address decoder and a control bus controller, to enable communication between the nonvolatile memories and an external system bus.  
     
     
       18. A nonvolatile memory system according to  claim 12 , 
       wherein said control device includes a host interface comprised of a data bus transceiver, an address bus driver, an address decoder and a control bus controller, to enable communication between the nonvolatile memories and an external system bus.