5V tolerant corner clamp with keep off circuit

Abstract

An electrostatic discharge (ESD) corner clamp is connected to a positive ESD rail that has a steady first voltage, such as 2.6V, and can be driven to a larger second voltage, such as 4.3V. The ESD corner clamp provides 5V tolerance by utilizing a keep off circuit that prevents the corner clamp from triggering when the voltage on the positive ESD rail changes from the first voltage to the second voltage.

What is claimed is:  
     
       1. A corner clamp comprising: 
       a clamp circuit connected to an electrostatic discharge (ESD) plus ring and an ESD minus ring, the clamp circuit having:  
       a timing circuit, the timing circuit having a resistive element connected to the ESD plus ring and a first node;  
       a pre-driver circuit connected to the timing circuit, the pre-driver circuit including a first transistor connected to the ESD plus ring, the first transistor turning on when a difference between a voltage on the ESD plus ring and a voltage on the first node exceeds a predetermined amount; and  
       a switching circuit connected to the pre-driver circuit, the ESD plus ring, and the ESD minus ring; and  
       a keep off circuit connected to the clamp circuit, the keep off circuit having:  
       a control circuit connected to the first node and a shield node, the control circuit having an output; and  
       a keep off transistor connected to the ESD plus ring, the first node, and the output of the control circuit, the keep off transistor providing a current path from the ESD plus ring to the first node when turned on.  
     
     
       2. The corner clamp of  claim 1  wherein: 
       the ESD plus ring has a steady first voltage, and can be driven to a larger second voltage, and  
       the keep off transistor sources a current into the first node when the voltage on the ESD plus ring changes from the first voltage to the second voltage, the current having a magnitude that prevents the difference from exceeding the predetermined amount.  
     
     
       3. The corner clamp of  claim 2  wherein when a voltage on the ESD plus ring spikes up to a third voltage that is substantially greater than the second voltage, the keep off transistor is turned off. 
     
     
       4. The corner clamp of  claim 1  wherein the control circuit includes: 
       a PMOS transistor having a source connected to the first node and a gate connected to the shield node; and  
       a NMOS transistor having a drain connected to the first node and a gate connected to the shield node.  
     
     
       5. The corner clamp of  claim 4  wherein the control circuit further includes an output transistor connected to the shield node and the keep off transistor. 
     
     
       6. The corner clamp of  claim 1  wherein the control circuit includes an inverter connected to the ESD plus ring, the ESD minus ring, and the shield node, the inverter having an output transistor that is connected to the shield node and the keep off transistor. 
     
     
       7. The corner clamp of  claim 6  wherein the output transistor has a gate connected to the shield node. 
     
     
       8. The corner clamp of  claim 6  and further comprising a reset transistor connected to the ESD plus ring and the keep off transistor. 
     
     
       9. The corner clamp of  claim 8  wherein the output transistor has a source that is connected to the reset transistor. 
     
     
       10. The corner clamp of  claim 1  wherein the clamp circuit includes: 
       a second transistor connected to the ESD minus ring; and  
       a capacitor connected to the ESD minus ring and the second transistor.  
     
     
       11. The corner clamp of  claim 10  wherein the clamp circuit further includes a third transistor connected to the first transistor and the second transistor. 
     
     
       12. The corner clamp of  claim 11  wherein the clamp circuit includes: 
       a first capacitive element connected to the resistive element;  
       a second capacitive element connected to the first capacitive element and the ESD minus ring, and  
       a bias circuit connected to the ESD plus ring and the first and second capacitive elements.  
     
     
       13. The corner clamp of  claim 12  wherein the switching circuit includes: 
       a fourth transistor connected to the ESD plus ring and the first transistor; and  
       a fifth output transistor connected to the ESD minus ring, the second transistor, the third transistor, and the fourth transistor.  
     
     
       14. A corner clamp comprising: 
       a clamp circuit connected to an electrostatic discharge (ESD) plus ring and an ESD minus ring, the clamp circuit having:  
       a timing circuit having:  
       a first resistive element connected to the ESD plus ring and a first node;  
       a first capacitive element connected to the first node;  
       a second capacitive element connected to the first capacitive element and the ESD minus ring; and  
       a bias circuit connected to the ESD plus ring and the first and second capacitive elements; and  
       a pre-driver circuit connected to the timing circuit, the pre-driver circuit including a first transistor connected to the ESD plus ring, the first transistor turning on when a difference between a voltage on the ESD plus ring and a voltage on the first node exceeds a predetermined amount; and  
       a switching circuit connected to the pre-driver circuit, the ESD plus ring, and the ESD minus ring.  
     
     
       15. The corner clamp of  claim 14  wherein the pre-driver circuit includes: 
       a second transistor that has a source connected to a drain of the first transistor, a gate, and a drain; and  
       a third transistor that has a source connected to the ESD minus ring, a gate connected to the gate of the second transistor, a drain connected to the drain of the second transistor.  
     
     
       16. The corner clamp of  claim 15  wherein the switching circuit includes: 
       a fourth transistor connected to the ESD plus ring and the first transistor; and  
       a fifth transistor connected to the ESD minus ring, the drain of the second transistor, and the fourth transistor.  
     
     
       17. The corner clamp of  claim 14  wherein the pre-driver circuit includes: 
       a second transistor connected to the ESD minus ring; and  
       a capacitor connected to the ESD minus ring and the second transistor.  
     
     
       18. The corner clamp of  claim 16  wherein the pre-driver circuit includes: 
       a third capacitive element connected to the ESD plus ring;  
       a fourth capacitive element connected to the third capacitive element and the fourth transistor, and  
       a bias circuit connected to the ESD plus ring and the third and fourth capacitive elements.