Format insensitive and bit rate independent optical preprocessor

Abstract

A method and circuit are presented for an all-optical format independent preprocessor that processes an arbitrary optical input signal by converting a NRZ signal to a PRZ signal, or if the input optical signal is RZ, by merely amplifying it. The method involves subtracting a delayed copy of the signal from the original, thereby effectively doubling its frequency, and inserting a pulse at each transition of the original signal, whether rising or falling. In a preferred embodiment this stage is implemented via an integrated SOA in each arm of an asymmetric interferometric device. The asymmetry consists of a delay element in one arm. In a preferred embodiment the entire device is fabricated on a semiconductor substrate, allowing for compactness as well as minimization of interconnectivity losses and overall power consumption. The output of the preprocessor, having a significant frequency component at its original clock rate, can then be fed to a clock recovery stage for all-optical clock recovery.

What is claimed:  
     
       1. A semiconductor device comprising: 
       an InP substrate of a first doping type;  
       a second InP layer of the first doping type disposed upon it;  
       a third InP layer not doped disposed upon said second layer;  
       a first InGaAsP waveguide region laterally disposed on top of said third InP layer, whose width is less than that of the substrate, first and second InP layers;  
       an active strained multiple quantum well (“SMQW”) region laterally disposed and centered on top of said first waveguide region, having the same width as said first waveguide region;  
       a second InGaAsP waveguide region laterally disposed on top of said SMQW layer, having the same width as said first waveguide region and as said SMQW region;  
       a fourth InP layer, undoped, disposed upon said second waveguide region, and extending downward, in the direction of the substrate, along the sides of said active region and said first waveguide region, whose width is equal to that of the substrate, and the first and second InP layers;  
       a first InP layer of a second doping type, laterally disposed above said fourth InP layer, having the same width as said first waveguide region and as said SMQW region;  
       a second InP layer of the second doping type, laterally disposed above said first InP layer of the second doping type, having the same width as said first InP layer of the second doping type;  
       a contact layer laterally disposed above said second InP layer of the second doping type;  
       a metal electrode disposed above said contact layer, and  
       wherein said device is configured to convey a signal over two different paths, one of said paths causing a predetermined signal delay with respect to the other of said paths.  
     
     
       2. An integrated optical circuit comprising the semiconductor device of  claim 1 .