Active Pixel Sensor with wired floating diffusions and shared amplifier

Abstract

An image sensor having a plurality of pixels arranged in a series of row and columns comprising a semiconductor substrate having a plurality of pixels formed in rows and columns with at least two pixels that each have a voltage to charge conversion region that are spatially isolated from each other and electrically connected to the source of a single reset transistor. The pixels that share a reset transistor can also share an amplifier, and a select electrical function. The preferred embodiment envisions adjacent pixels, although, immediate adjacency is not a requirement.

What is claimed is:  
     
       1. An image sensor having a plurality of pixels arranged in a series of row and columns comprising: 
       a semiconductor material of a first conductivity type;  
       at least two adjacent pixels formed within the semiconductor material, each of the pixels having a charge to voltage conversion region operatively coupled to a photodetector such that the charge to voltage conversion regions are spatially isolated from each other; and  
       an interconnect layer that permanently shorts together the charge to voltage conversion regions.  
     
     
       2. The image sensor of  claim 1  further comprising a single reset transistor operative for the at least two adjacent pixels. 
     
     
       3. The image sensor of  claim 2  wherein the source of the reset transistor is spatially isolated from and electrically connected to the charge to voltage conversion regions. 
     
     
       4. The image sensor of  claim 1  wherein the at least two adjacent pixels are in different rows but the same columns and share a row select feature. 
     
     
       5. The image sensor of  claim 4  wherein the at least two adjacent pixels have independent transfer means for transferring charge to the charge to voltage conversion region from the photodetector. 
     
     
       6. The image sensor of  claim 1  wherein the at least two adjacent pixels share an amplifier. 
     
     
       7. The image sensor of  claim 1  wherein the at least two adjacent pixels share an amplifier and a row select feature. 
     
     
       8. The image sensor of  claim 1  further comprising at least two transfer gate buses for each row of pixels. 
     
     
       9. The image sensor of  claim 1  wherein the adjacent pixels are not all abutting each other. 
     
     
       10. An image sensor having a plurality of pixels arranged in a series of row and columns comprising: 
       a semiconductor material of a first conductivity type;  
       a predetermined subset of pixels comprising at least two pixels formed within the semiconductor material, each of the pixels having a charge to voltage conversion region operatively coupled to a photodetector such that the charge to voltage conversion regions are spatially isolated from each other; and  
       an interconnect layer that permanently shorts together the charge to voltage conversion regions.  
     
     
       11. The image sensor of  claim 10  further comprising a single reset transistor operative for the pixels. 
     
     
       12. The image sensor of  claim 11  wherein the source of the reset transistor is spatially isolated from and electrically connected to the charge to voltage conversion regions. 
     
     
       13. The image sensor of  claim 10  wherein the at least two adjacent pixels are in different rows but the same columns and share a row select feature. 
     
     
       14. The image sensor of  claim 13  wherein the at least two adjacent pixels have independent transfer means for transferring charge to the charge to voltage conversion region from the photodetector. 
     
     
       15. The image sensor of  claim 10  wherein the at least two adjacent pixels share an amplifier. 
     
     
       16. The image sensor of  claim 10  wherein the at least two adjacent pixels share an amplifier and a row select feature. 
     
     
       17. The image sensor of  claim 10  further comprising at least two transfer gate buses for each row of pixels. 
     
     
       18. The image sensor of  claim 10  wherein the adjacent pixels are not all abutting each other.