Method and apparatus for releasing functional units in a multithreaded VLIW processor

Abstract

A method and apparatus are disclosed for releasing functional units in a multithreaded very large instruction word (VLIW) processor. The functional unit release mechanism can retrieve the capacity lost due to multiple cycle instructions. The functional unit release mechanism of the present invention permits idle functional units to be reallocated to other threads, thereby improving workload efficiency. Instruction packets are assigned to functional units, which can maintain their state, independent of the issue logic. Each functional unit has an associated state machine (SM) that keeps track of the number of cycles that the functional unit will be occupied by a multiple-cycle instruction. Functional units do not reassign themselves as long as the functional unit is busy. When the instruction is complete, the functional unit can participate in functional unit allocation, even if other functional units assigned to the same thread are still busy. The functional unit release approach of the present invention allows the functional units that are not associated with a multiple-cycle instruction to be allocated to other threads while the blocked thread is waiting, thereby improving throughput of the multithreaded VLIW processor. Since the state is associated with each functional unit separately from the instruction issue unit, the functional units can be assigned to threads independently of the state of any one thread and its constituent instructions.

We claim:  
     
       1. A multi threaded very large instruction word processor, comprising: 
       a plurality of functional units for executing instructions from a multithreaded instruction stream; and  
       a functional unit release mechanism that reallocates at least one of said functional units to another thread when a currently executing instruction executed by said at least one functional unit is complete in response to an indicator, wherein said indicator indicates a time that said currently executing instruction will be complete.  
     
     
       2. The multithreaded very large instruction word processor of  claim 1 , wherein said functional unit release mechanism monitors a number of cycles that each functional unit will be occupied. 
     
     
       3. The multithreaded very large instruction word processor of  claim 1 , wherein said at least one functional unit includes a state machine for maintaining state information. 
     
     
       4. The multithreaded very large instruction word processor of  claim 3 , wherein said state machine monitors a number of cycles that said at least one functional unit will be occupied by a multiple-cycle instruction. 
     
     
       5. The multithreaded very large instruction word processor of  claim 3 , wherein said functional unit release mechanism detects when said at least one functional unit is idle. 
     
     
       6. A multithreaded very large instruction word processor, comprising: 
       a plurality of functional units for executing instructions from a multithreaded instruction stream; and  
       a state machine associated with at least one of said functional units for monitoring a number of cycles that said at least one functional unit will be occupied, said state machine reallocating said at least one functional unit when a currently executing instruction is complete by generating an indicator wherein said indicator indicates a time that said currently executing instruction will be complete.  
     
     
       7. The multithreaded very large instruction word processor of  claim 6 , wherein said state machine maintains state information. 
     
     
       8. The multithreaded very large instruction word processor of  claim 7 , wherein said state machine monitors a number of cycles that said at least one functional unit will be occupied by a multiple-cycle instruction. 
     
     
       9. The multithreaded very large instruction word processor of  claim 6 , wherein said state machine detects when said at least one functional unit is idle. 
     
     
       10. A method of processing instructions from a multithreaded instruction stream in a multithreaded very large instruction word processor, comprising the steps of: 
       executing said instructions using a plurality of functional units; and  
       reallocating at least one of said functional units to another thread when a currently executing instruction executed by said at least one functional unit is complete in response to an indicator, wherein said indicator indicates a time that said currently executing instruction will be complete.  
     
     
       11. The method of  claim 10 , wherein said relocating step further comprises the step of monitoring a number of cycles that each functional unit will be occupied. 
     
     
       12. The method of  claim 10 , further comprising the step of maintaining state information for said at least one functional unit. 
     
     
       13. The method of  claim 12 , wherein said state information includes a number of cycles that said at least one functional unit will be occupied by a multiple-cycle instruction. 
     
     
       14. The method of  claim 12 , wherein said reallocating step detects when said at least one functional unit is idle. 
     
     
       15. A method of processing instructions from a multithreaded instruction stream in a multithreaded very large instruction word processor, comprising the steps of: 
       executing said instructions using a plurality of functional units;  
       monitoring a number of cycles that at least one of said functional unit will be occupied; and  
       reallocating said at least one functional unit when a currently executing instruction is complete in response to an indicator, wherein said indicator indicates a time that said currently executing instruction will be complete.  
     
     
       16. The method of  claim 15 , wherein said monitoring step is performed by a state machine. 
     
     
       17. The method of  claim 15 , wherein monitoring step monitors a number of cycles that said at least one functional unit will be occupied by a multiple-cycle instruction. 
     
     
       18. An article of manufacture for processing instructions from an instruction stream having a plurality of threads in a multithreaded very large instruction word processor, comprising: 
       a computer readable medium having computer readable program code means embodied thereon, said computer readable program code means comprising program code means for causing a computer to:  
       execute said instructions using a plurality of functional units; and  
       reallocate at least one of said functional units to another thread when a currently executing instruction executed by said at least one functional unit is complete in response to an indicator, wherein said indicator indicates a time that said currently executing instruction will be complete.  
     
     
       19. An article of manufacture for processing instructions from an instruction stream having a plurality of threads in a multithreaded very large instruction word processor, comprising: 
       a computer readable medium having computer readable program code means embodied thereon, said computer readable program code means comprising program code means for causing a computer to:  
       execute said instructions using a plurality of functional units;  
       monitor a number of cycles that at least one of said functional unit will be occupied; and  
       reallocate said at least one functional unit when a currently executing instruction is complete in response to an indicator, wherein said indicator indicates a time that said currently executing instruction will be complete.