US6670854B2ExpiredUtilityA1

Fractional-N frequency synthesizer and method of operating the same

89
Assignee: NIPPON PRECISION CIRCUITSPriority: Aug 3, 2001Filed: Jul 10, 2002Granted: Dec 30, 2003
Est. expiryAug 3, 2021(expired)· nominal 20-yr term from priority
H03L 7/1976Y10S331/02H03L 7/0891
89
PatentIndex Score
41
Cited by
7
References
7
Claims

Abstract

A fractional-N frequency synthesizer is offered which does not produce spurious signals of periodically conspicuous spectral intensities and can cancel produced spurious signals up to a practical level even with a spurious-canceling circuit of low accuracy. The synthesizer has a sigma-delta noise shaper. The integral and fractional parts of a frequency divide ratio-setting value that frequency-divides the output signal are set. The fractional part of the frequency divide ratio-setting value is applied to the sigma-delta noise shaper every phase comparison period. The output from the noise shaper and the integral part of the frequency divide ratio-setting value are summed up to thereby produce a sum. The output signal is frequency-divided, using this sum as a frequency divide ratio. The difference between the fractional part of the frequency divide ratio-setting value and the output from the sigma-delta noise shaper is produced and accumulated in an accumulator every phase comparison period. The spurious-canceling value is produced based on the value of the accumulator.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
       1. A method of operating a fractional-N frequency synthesizer, comprising the steps of: 
       preparing a sigma-delta noise shaper;  
       setting integral and fractional parts of a frequency divide ratio-setting value for frequency-dividing an output signal;  
       applying the fractional part of the frequency divide ratio-setting value to said sigma-delta noise shaper every phase comparison period;  
       summing up an output from said sigma-delta noise shaper and the integral part of the frequency divide ratio-setting value to thereby create a sum;  
       frequency-dividing the output signal, using this sum as a frequency divide ratio;  
       producing a difference between the fractional part of said frequency divide ratio-setting value and the output from said sigma-delta noise shaper;  
       accumulating said difference in an accumulator every phase comparison period; and  
       producing a spurious-canceling value based on a value obtained from said accumulator.  
     
     
       2. A method as set forth in  claim 1 , further comprising the steps of: 
       converting an output from said accumulator into an analog value; and  
       adding said analog value to an output from a phase comparator, said output from the phase comparator being a phase difference between the output signal frequency-divided by said frequency divide ratio and a reference signal.  
     
     
       3. A method as set forth in  claim 2 , wherein timing at which said analog value and the output from said phase comparator are added up is restricted to a range close to output timing of said phase comparator. 
     
     
       4. A fractional-N frequency synthesizer having a voltage-controlled oscillator, a phase comparator, and a variable frequency divider mounted between said voltage-controlled oscillator and said phase comparator, said frequency synthesizer comprising: 
       means for setting integral and fractional parts of a frequency divide ratio-setting value for frequency-dividing an output signal from said voltage-controlled oscillator by the variable frequency divider;  
       a sigma-delta noise shaper to which said fractional part is applied every phase comparison period; and  
       adder means for summing up an output from the sigma-delta noise shaper and said integral part to thereby produce a sum output;  
       wherein the sum output from the adder means is used as a frequency divide ratio by the variable frequency divider, and wherein the output signal from said voltage-controlled oscillator is frequency-divided and supplied to said phase comparator.  
     
     
       5. A fractional-N frequency synthesizer as set forth in  claim 4 , further comprising: 
       means for creating a difference between the fractional part of said frequency divide ratio-setting value and the output from said sigma-delta noise shaper;  
       means for accumulating the difference every phase comparison period; and  
       means for producing a spurious-canceling value based on the accumulated value.  
     
     
       6. A fractional-N frequency synthesizer as set forth in  claim 5 , wherein the means for producing said spurious-canceling value further includes: means for limiting the produced spurious-canceling value to a range close to output timing of said phase comparator based on the period of the output signal from said voltage-controlled oscillator; and adder means for adding the produced spurious-canceling value to the output from said phase comparator. 
     
     
       7. A fractional-N frequency synthesizer as set forth in  claim 4 , wherein there are further provided a random number generator and adder means for producing a sum of an output from the random number generator and the fractional part of said frequency divide ratio-setting value, and wherein said sum from the adder means is applied to said delta-sigma noise shaper.

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