US6697424B1ExpiredUtility

Fast convergent pipelined adaptive decision feedback equalizer using post-cursor processing filter

72
Assignee: IND TECH RES INSTPriority: May 6, 2003Filed: May 6, 2003Granted: Feb 24, 2004
Est. expiryMay 6, 2023(expired)· nominal 20-yr term from priority
H04L 25/03057H04L 2025/03617H04L 2025/0349
72
PatentIndex Score
20
Cited by
11
References
8
Claims

Abstract

A fast convergent pipeline adaptive decision feedback equalizer using a post-cursor processing filter is disclosed, which includes a feed-forward equalizer, a post-cursor processing filter, an adder, a slicer, a register, a pipelined feedback equalizer, a subtractor and a updating device. The pipelined feedback equalizer has a delay device coupled to the register for delaying its output signal, and a feedback equalizer coupled to the delay device for eliminating the post-cursor of the output signal. By using the post-cursor processing filter (PCF), it increases the operating clock rate with arbitrary speedup factor, and improves the convergence rate of the overall system.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
       1. A fast convergent pipelined adaptive decision feedback equalizer using a post-cursor processing filter, comprising: 
       a feed-forward equalizer for receiving input samples and eliminating pre-cursor of the input samples;  
       a post-cursor processing filter coupled to the feed-forward equalizer and producing an output signal;  
       an adder for adding the output signal of the post-cursor processing filter and a feedback signal to producing an pre-quantization signal;  
       a slicer coupled to the adder for quantizing the pre-quantization signal and producing a white quantized signal;  
       a register coupled to the slicer for holding the white quantized signal;  
       a pipelined feedback equalizer having plurality of pipeline stages and coupling to the register for eliminating the post-cursor of the white quantized signal and producing the feedback signal;  
       a subtractor for subtracting the pre-quantization signal from the quantized signal to produce a cost signal; and  
       an updating device for updating coefficients of the feed-forward equalizer and pipelined feedback equalizer based on the cost signal and updating coefficients of the post-cursor processing filter based on the cost signal and the white quantized signal.  
     
     
       2. The fast convergent pipelined adaptive decision feedback equalizer as claimed in  claim 1 , wherein the pipelined feedback equalizer comprises a delay device coupled to the register for delaying the white quantized signal, and a feedback equalizer coupled to the delay device for eliminating the post-cursor of the white quantized signal and producing the feedback signal. 
     
     
       3. The fast convergent pipelined adaptive decision feedback equalizer as claimed in  claim 2 , wherein the post-cursor processing filter is formed by inserting the same poles and zeros pairs:            P        (   z   )       =         N        (   z   )         D        (   z   )         =           Q        (   z   )            N        (   z   )             Q        (   z   )            D        (   z   )           =         Q        (   z   )            N        (   z   )           1   -       z     -     (       D   1     +   1     )              R        (   z   )                   ,                   
       where N(z) is a transfer function of the feed-forward equalizer, D(z) is a transfer function of the feedback equalizer,          Q        (   z   )       =       ∑     i   =   0       D   1              q   i          z     -   i                           
       is a transfer function of the post-cursor processing filter, parameter D 1  is the number of delay elements in the delay device. 
     
     
       4. The fast convergent pipelined adaptive decision feedback equalizer as claimed in  claim 3 , wherein a highest operating clock rate of the pipeline adaptive decision feedback equalizer can be increased to a factor of (D 1 +1). 
     
     
       5. The fast convergent pipelined adaptive decision feedback equalizer as claimed in  claim 1 , wherein the coefficients of the feed-forward equalizer and feedback equalizer are updated based on minimizing a first cost function: ∥e(n)∥ 2 , where e(n) is the cost signal. 
     
     
       6. The fast convergent pipelined adaptive decision feedback equalizer as claimed in  claim 1 , wherein the coefficients of the post-cursor processing filter are updated based on minimizing a second cost function:                  Min     P   1            {       E   2          {       e        (   n   )            a        (     n   -   1     )         }       }       ,       Min     P   2            {       E   2          {       e        (   n   )            a        (     n   -   2     )         }       }       ,   …              ,                 Min     P     D   1              {       E   2          {       e        (   n   )            a        (     n   -     D   1       )         }       }                           
       where e(n) is the cost signal, α(n) is the white quantized signal, and 
       P(n)={P 1 ,P 2 , . . . , PD 1 } represents the coefficients of the post-cursor processing filter.  
     
     
       7. The fast convergent pipelined adaptive decision feedback equalizer as claimed in  claim 5 , wherein the coefficients of the post-cursor processing filter are updated based on minimizing a second cost function:                  Min     P   1            {       E   2          {       e        (   n   )            a        (     n   -   1     )         }       }       ,       Min     P   2            {       E   2          {       e        (   n   )            a        (     n   -   2     )         }       }       ,   …              ,                 Min     P     D   1              {       E   2          {       e        (   n   )            a        (     n   -     D   1       )         }       }                           
       where e(n) is the cost signal, α(n) is the white quantized signal, and P(n)={P 1 ,P 2 , . . . , PD 1 } represents the coefficients of the post-cursor processing filter. 
     
     
       8. The fast convergent pipelined adaptive decision feedback equalizer as claimed in  claim 7 , wherein the coefficients of the post-cursor processing filter are:            P        (   n   )       =       P        (     n   -     D   4       )       +     μ          ∑     i   =   0       LA   -   1              e        (     n   -     D   5     -   i     )            Z        (     n   -     D   5     -   i     )                 ,                   
       where Z(n)=[a(n−1) . . . a(n−D 1 )].

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