Trimmer method and device for circuits

Abstract

In a trimmer method and device, a reference signal of a target circuit is compared with a test signal, and a binary count output is generated according to result of the comparison. Thereafter, according to logic states of bits of the binary count output, electrical conduction through passive components that are coupled to the target circuit and that correspond respectively to the bits of the binary count output are selectively enabled and disabled so as to adjust the reference signal. The above steps are repeated by varying the binary count output until the reference signal approximates the test signal. Thereafter, fuses coupled to the passive components are melted selectively in a single fuse-melting operation so as to maintain the enabled and disabled states of electrical conduction through the passive components in order to set the reference signal to be approximate to the test signal.

We claim:  
     
       1. A trimmer method comprising: 
       a) comparing a reference signal of a target circuit with a test signal, and generating a binary count output according to result of the comparison;  
       b) according to logic states of bits of the binary count output, selectively enabling and disabling electrical conduction through passive components that are coupled to the target circuit and that correspond respectively to the bits of the binary count output so as to adjust the reference signal; and  
       c) repeating steps a) and b) by varying the binary count output until the reference signal approximates the test signal.  
     
     
       2. The trimmer method as claimed in  claim 1 , further comprising, after step c), the step of selectively melting fuses in a fuse set that is coupled to the passive components so as to maintain the enabled and disabled states of electrical conduction through the passive components in order to set the reference signal to be approximate to the test signal. 
     
     
       3. The trimmer method as claimed in  claim 1 , wherein step a) includes: 
       generating a comparator signal according to the result of the comparison between the reference signal and the test signal; and  
       performing a logic operation between the comparator signal and a pulse signal derived from the test signal to result in a control signal for driving a counter to generate the binary count output that is varied until the reference signal approximates the test signal.  
     
     
       4. The trimmer method as claimed in  claim 1 , wherein electrical conduction through the respective one of the passive components is enabled when the corresponding one of the bits of the binary count output is at a first logic state, and is disabled when the corresponding one of the bits of the binary count output is at a second logic state. 
     
     
       5. The trimmer method as claimed in  claim 4 , wherein the first logic state is a high logic state, and the second logic state is a low logic state. 
     
     
       6. A trimmer device for adjusting a reference signal of a target circuit, said trimmer device comprising: 
       a plurality of passive components adapted to be coupled to the target circuit;  
       a switch device including a plurality of first transistor units, each of which is coupled to a respective one of said passive components and is operable so as to selectively enable and disable electrical conduction through the respective one of said passive components for adjusting the reference signal;  
       a counter coupled to said switch device and operable so as to generate a binary count output that is used to selectively turn on and turn off said first transistor units of said switch device; and  
       a comparator circuit coupled to said counter and adapted to be coupled to the target circuit, said comparator circuit being adapted to compare the reference signal with a test signal, and generating a control signal according to result of the comparison between the reference signal and the test signal for driving said counter to vary the binary count output until the reference signal approximates the test signal.  
     
     
       7. The trimmer device as claimed in  claim 6 , wherein said comparator circuit includes: 
       a comparator adapted to be coupled to the target circuit, said comparator being adapted to compare the reference signal with the test signal, and generating a comparator signal according to the result of the comparison between the reference signal and the test signal;  
       a pulse generator adapted to be triggered by the test signal so as to generate a pulse signal, and  
       a first logic gate coupled to said comparator and said pulse generator and operable so as to generate the control signal as a result of a first logic operation between the comparator signal and the pulse signal;  
       wherein a change in logic state of the comparator signal when the reference signal approximates the test signal inhibits said first logic gate from generating the control signal to stop driving said counter from varying the binary count output.  
     
     
       8. The trimmer device as claimed in  claim 7 , wherein said first logic gate is an AND gate. 
     
     
       9. The trimmer device as claimed in  claim 6 , wherein said passive components are resistive components. 
     
     
       10. The trimmer device as claimed in  claim 6 , further comprising a plurality of fuses, each of which is coupled to a respective one of said passive components, said fuses being melted selectively so as to maintain the enabled and disabled states of electrical conduction through said passive components in order to set the reference signal to be approximate to the test signal. 
     
     
       11. The trimmer device as claimed in  claim 10 , wherein said switch device further includes a plurality of second transistor units coupled to said fuses respectively, said second transistor units being coupled to said counter and being controlled by the comparator signal and a corresponding bit of the binary count output of said counter so as to provide a path for passage of energy when the respective one of said fuses is selected for melting. 
     
     
       12. The trimmer device as claimed in  claim 11 , wherein each of said second transistor units includes a transistor coupled to the respective one of said fuses, and a second logic gate coupled to said transistor and performing a second logic operation between the comparator signal and the corresponding bit of the binary count output of said counter for controlling turning on and turning off of said transistor. 
     
     
       13. The trimmer device as claimed in  claim 12 , wherein said second logic gate is a NOR gate. 
     
     
       14. A trimmer device for adjusting a reference signal of a target circuit, said trimmer device comprising: 
       a plurality of passive components adapted to be coupled to the target circuit;  
       a plurality of first transistor units, each of which is coupled to a respective one of said passive components and is operable so as to selectively enable and disable electrical conduction through the respective one of said passive components for adjusting the reference signal;  
       a counter coupled to said first transistor units and operable so as to generate a binary count output that is used to selectively turn on and turn off said first transistor units;  
       a comparator adapted to be coupled to the target circuit and adapted to compare the reference signal with a test signal, said comparator generating, a comparator signal according to result of the comparison between the reference signal and the test signal;  
       a pulse generator adapted to be triggered by the test signal so as to generate a pulse signal;  
       a first logic gate coupled to said comparator and said pulse generator, and operable so as to generate a control signal as a result of a first logic operation between the comparator signal and the pulse, signal, the control signal being provided to said counter for driving said counter to vary the binary count output, a change in logic state of the comparator signal when the reference signal approximates the test signal inhibiting said first logic gate from generating the control signal to stop driving said counter from varying the binary count output;  
       a plurality of fuses, each of which is coupled to a respective one of said passive components, said fuses being melted selectively so as to maintain the enabled and disabled states of electrical conduction through said passive components in order to set the reference signal to be approximate to the test signal; and  
       a plurality of second transistor units, each of which is coupled to said counter and to a respective one of said fuses, each of said second transistor units being controlled by the comparator signal and a corresponding bit of the binary count output of said counter so as to provide a path for passage of energy when the respective one of said fuses is selected for melting.  
     
     
       15. The trimmer device as claimed in  claim 14 , wherein each of said second transistor units includes a transistor coupled to the respective one of said fuses, and a second logic gate coupled to said transistor and performing a second logic operation between the comparator signal and the corresponding bit of the binary count output of said counter for controlling turning on and turning off of said transistor. 
     
     
       16. The trimmer device as claimed in  claim 15 , wherein said second logic gate is a NOR gate. 
     
     
       17. The trimmer device as claimed in  claim 14 , wherein said passive components are resistive components. 
     
     
       18. The trimmer device as claimed in  claim 14 , wherein said first logic gate is an AND gate. 
     
     
       19. The trimmer device as claimed in  claim 14 , wherein each of said first and second transistor units includes an n-channel MOSFET. 
     
     
       20. The trimmer device as claimed in  claim 14 , wherein said first transistor units correspond respectively to the bits of the binary count output of said counter, each of said first transistor units enabling electrical conduction through the respective one of said passive components when the corresponding one of the bits of the binary count output is at a first logic state, and disabling electrical conduction through the respective one of said passive components when the corresponding one of the bits of the binary count output is at a second logic state. 
     
     
       21. The trimmer device as claimed in  claim 20 , wherein the first logic state is a high logic state, and the second logic state is a low logic state.