P
US6710474B2ExpiredUtilityPatentIndex 62

Circuit arrangement for switching on a partial circuit arrangement

Assignee: PATENT TREUHAND GES FUER ELEKTRISCHE GLUEHLAMPEN MBHPriority: Jan 12, 2001Filed: Jan 2, 2002Granted: Mar 23, 2004
Est. expiryJan 12, 2021(expired)· nominal 20-yr term from priority
Inventors:FRANCK FELIX
H05B 41/2825
62
PatentIndex Score
2
Cited by
24
References
9
Claims

Abstract

A circuit for switching on a partial circuit includes a first switching element (T 1 ), a second switching element (T 2 to T 6 ), an activation circuit for the first switching element, a first diode (D 1 ), a second diode (D 2 ), and a third diode (D 3 ). During operation, when the partial circuit is being switched on, first switching element (T 1 ) is activated and second switching element (T 2 to T 6 ) is assigned no activity. The activation circuit for the first switching element (T 1 ) includes a storage capacitor (C 1 ) and a DIAC coupled to a control electrode of the first switching element (T 1 ). First diode (D 1 ), second diode (D 2 ), and third diode (D 3 ) are arranged such that stored energy in storage capacitor (C 1 ) is more effectively utilized for activating the first switching element (T 1 ), thus allowing use of a smaller capacitance for the storage capacitor (C 1 ).

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
       1. A circuit arrangement for switching on a partial circuit arrangement, having 
       a first switching element (T 1 ), the first switching element (T 1 ) having a control electrode and a reference electrode, which is connected to a reference potential;  
       a partial circuit arrangement, the first switching element (T 1 ) having to be activated when the partial circuit arrangement is being switched on;  
       at least one second switching element (T 2  to T 6 ), which is required for the operation of the circuit arrangement after the partial circuit arrangement has been switched on, but which is not assigned any activity when the partial circuit arrangement is being switched on, the at least one second switching element (T 2  to T 6 ) having a control electrode and a reference electrode, which is connected to the reference potential;  
       an activation circuit for the first switching element (T 1 ), the activation circuit comprising a storage capacitor (C 1 ) which, to activate the first switching element (T 1 ), is connected via a DIAC to the control electrode of the first switching element (T 1 ); and  
       a first diode (D 1 ) which is arranged between the reference potential and the storage capacitor (C 1 ) in such a way that it is made possible for a current to flow to activate the first switching element (T 1 );  
       characterized in that 
       in series with the first diode (D 1 ), on the side of the first diode (D 1 ) facing away from the reference potential, a second diode (D 2 ) is arranged in the same orientation as the first diode (D 1 ), the junction between the first and the second diode (D 1 , D 2 ) being connected to the control electrode of the at least one second switching element (T 2  to T 6 ), and  
       in series in a connection between the control electrode of the second switching element (T 2  to T 6 ) and the reference potential, in addition to the second diode (D 2 ), at least one third diode (D 3 ) is connected in the same orientation as the second diode (D 2 ).  
     
     
       2. The circuit arrangement as claimed in  claim 1 , characterized in that the side of the series circuit comprising the second and third diode (D 2 , D 3 ) facing away from the control electrode of the second switching element (T 2  to T 6 ) is connected firstly to the storage capacitor (C 1 ) and secondly via a resistor (R 2 ) to the reference potential. 
     
     
       3. The circuit arrangement as claimed in  claim 1 , characterized in that the junction (P 1 ) between the second and third diode (D 2 , D 3 ) is connected to the storage capacitor (C 1 ), and the third diode (D 3 ) is connected by its other terminal to the reference potential. 
     
     
       4. The circuit arrangement as claimed in  claim 1 , characterized in that it comprises at least n, n≧2, second switching elements (T 2  to T 6 ), the reference electrodes of all the second switching elements (T 2  to T 6 ) being connected to the same reference potential, each second switching element (T 2  to T 6 ) being assigned a second diode (D 2  to D 62 ), and the sides of the respective second diodes (D 2  to D 62 ) facing away from the control electrode of the respective second switching element (T 2  to T 6 ) being interconnected, so that the third diode (D 3 ) acts for all the second switching elements (T 2  to T 6 ). 
     
     
       5. The circuit arrangement as claimed in  claim 4 , characterized in that it has m first diodes (D 1  to D 61 ), where 1≦m≦n, the association in each case between a first diode (D 1  to D 61 ) and the n second switching elements (T 2 ) being as desired. 
     
     
       6. The circuit arrangement as claimed in  claim 1 , characterized in that at least one second switching element (T 2  to T 6 ) has an operating electrode (CT 2 ) which is coupled to the line between the storage capacitor (C 1 ) and the control electrode of the first switching element (T 1 ). 
     
     
       7. The circuit arrangement as claimed in  claim 1 , characterized in that a control electrode (BT 2 ) of at least one second switching element (T 2  to T 6 ) is coupled to the line between the storage capacitor (C 1 ) and the control electrode of the first switching element (T 1 ). 
     
     
       8. The circuit arrangement as claimed in  claim 1 , characterized in that the storage capacitor (C 1 ) is arranged in series with at least one resistor between a voltage source and the reference potential. 
     
     
       9. An operating device for a lamp having a circuit arrangement as claimed in  claim 1 , the circuit arrangement comprising a half-bridge arrangement with two half-bridge transistors (T 1 , T 8 ), and the first switching element being one of the two half-bridge transistors (T 1 ; T 8 ).

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