Digitally controlled crystal oscillator with integrated coarse and fine control
Abstract
A method of tuning a DCXO includes the step of providing a coarse tuning array and a fine tuning array of capacitors fabricated on the same integrated circuit die. The coarse array is adjusted until the difference between a desired frequency and the output frequency corresponds to a change in capacitance no greater than half the range of the fine tuning array. In one embodiment, the fine tuning array is adjusted to mid-range before adjusting the coarse tuning array. A DCXO apparatus includes at least one integrated circuit segmented switched capacitor network providing a capacitance that is a nonmonotonic function of a composite input code. The segmented switched capacitor network includes parallel coupled binary weighted and thermometer coded switched capacitor networks for coarse and fine tuning, respectively.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A method of tuning a digitally controlled crystal oscillator (DCXO) to a desired frequency, comprising the steps of:
a) providing a DCXO having a coarse tuning array and a fine tuning array of capacitors fabricated on a same integrated circuit die, wherein the coarse tuning array comprises a binary weighted switched capacitor network, wherein the fine tuning array comprises a thermometer coded switched capacitor network;
b) adjusting the coarse tuning array until a difference between the desired frequency and the DCXO output frequency corresponds to a required change in capacitance no greater than half the range of the fine tuning array; and
c) adjusting the fine tuning array until the output frequency substantially matches the desired frequency.
2. The method of claim 1 wherein step b) further comprises the step of adjusting the coarse tuning array until the required change in capacitance is less than a capacitance associated with a least significant bit of the coarse tuning array.
3. The method of claim 1 further comprising the step of:
e) setting the fine tuning array to mid-range before adjusting the coarse tuning array.
4. The method of claim 1 wherein the coarse and fine tuning arrays collectively form a segmented capacitor network providing a range of capacitance values that is a nonmonotonic function Z of a composite input code, wherein there exists distinct composite input code domains D 1 and D 2 with associated ranges R 1 and R 2 such that D 1 ∩D 2 =Ø and R 1 ∩R 2 ≠Ø.
5. The method of claim 4 wherein there exists distinct composite input codes θ 1 , θ 2 such that Z(θ 1 )≈Z(θ 2 ).
6. The method of claim 1 wherein the coarse and fine tuning arrays collectively form a segmented capacitor network providing a range of capacitance values that is a monotonic function Z of a composite input code, wherein a first n bits of the composite input code control the coarse tuning array, wherein a remaining m bits of the composite input code control the fine tuning array, wherein distinct composite input code domains D 1 and D 2 have distinct associated ranges R 1 and R 2 such that if D 1 ∩D 2 =Ø then R 1 ∩R 2 =Ø.
7. The method of claim 1 wherein the coarse tuning array is an n-bit binary weighted switched capacitor network with a switchable capacitance C B associated with a least significant bit, wherein the fine tuning array is an m-bit thermometer coded switched capacitor network having 2 m switched capacitors of substantially the same capacitance, C T .
8. The method of claim 7 wherein 2 m C T <C B .
9. The method of claim 7 wherein C B ≦2 m C T .
10. A digitally controlled crystal oscillator (DCXO) apparatus comprising:
a) a coarse tuning array of capacitors comprising an n-bit binary weighted switched capacitor network with a switchable capacitance C B associated with a least significant bit, the coarse tuning array providing a first range of tuning capacitance; and
b) a fine tuning array of capacitors comprising an m-bit thermometer coded switched capacitor network having 2 m switched capacitors of substantially the same capacitance C T , the fine tuning array providing a second range of tuning capacitance, the fine tuning array coupled in parallel with the coarse tuning array to form a first segmented capacitor network, wherein the coarse and fine tuning arrays are formed on a same integrated circuit die, wherein C B >C T .
11. The apparatus of claim 10 further comprising a second segmented capacitor network, wherein the first and second segmented capacitor networks correspond to variable capacitive elements of the DCXO.
12. The apparatus of claim 11 further comprising:
c) a processor controlling each of the first and second segmented capacitor networks to vary a frequency of the DCXO.
13. The apparatus of claim 11 wherein the oscillator is a selected one of a Pierce, Colpitts, and a Clapp type oscillator.
14. The apparatus of claim 10 further comprising:
c) a processor controlling the first segmented capacitor network to vary a frequency of the DCXO.
15. The apparatus of claim 14 wherein the processor adjusts the coarse tuning array while maintaining the fine tuning array at mid-range until a difference in the DCXO output frequency and a desired frequency corresponds to a change in capacitance of the coarse tuning array not exceeding the capacitance associated with a least significant bit of the coarse tuning array.
16. The apparatus of claim 15 wherein the processor adjusts the fine tuning array until the output frequency of the DCXO substantially matches a desired frequency.
17. The apparatus of claim 10 wherein 2 m C T <C B .
18. The apparatus of claim 10 wherein C B ≦2 m C T .
19. The apparatus of claim 10 wherein the first segmented capacitor network provides a range of capacitance values that is a nonmonotonic function Z of an input code, wherein there exists distinct input code domains D 1 and D 2 with associated ranges R 1 and R 2 such that D 1 ∩D 2 =Ø and R 1 ∩R 2 ≠Ø.
20. The apparatus of claim 19 wherein there exists distinct input codes θ 1 , θ 2 such that Z(θ 1 )≈Z(θ 2 ).
21. A digitally controlled crystal oscillator (DCXO) apparatus comprising:
an n-bit binary weighted coarse tuning array of capacitors; an m-bit thermometer coded fine tuning array of capacitors coupled in parallel with the coarse tuning array to form a segmented switched capacitor network, wherein the segmented switched capacitor network provides a capacitance that is a nonmonotonic function Z of a composite input code; and
a processor coupled to provide the composite input code, wherein an output frequency of the DCXO varies in response to the composite input code.
22. The apparatus of claim 21 wherein the thermometer coded array comprises unit capacitances C T of substantially the same value, wherein the least significant bit of the binary weighted array has an associated capacitance C B , wherein 2 m C T <C B .
23. The apparatus of claim 21 wherein the thermometer coded array comprises unit capacitances C T of substantially the same value, wherein the least significant bit of the binary weighted array has an associated capacitance C B , wherein 2 m C T ≧C B .Cited by (0)
No later patents cite this yet.
References (0)
No backward citations on record.