High Q on-chip inductor

Abstract

A high Q on-chip inductor includes a primary winding and an auxiliary winding that is coupled to receive a proportionally opposite representation of an input of the primary winding. Further, the auxiliary winding has an admittance that is greater than the admittance of the primary winding thereby yielding an asymmetry in the admittances. As such, a push/pull mechanism is obtained in a 2-port system (e.g., 1 st and 2 nd nodes of the primary winding) that produces a large Q factor for an on-chip inductor.

What is claimed is:  
     
       1. A high-Q on-chip inductor comprises: 
       primary winding including a first node and a second node, wherein the primary winding has a first admittance; and  
       auxiliary winding including a first node and a second node, wherein the auxiliary winding has a second admittance, wherein the second node of the primary winding is coupled to the second node of the auxiliary winding, wherein the second admittance is greater than the first admittance, wherein the first node of the primary winding is operably coupled to receive a first leg of an input, wherein the second node of the primary winding is coupled to receive a second leg of the input, and wherein the first node of the auxiliary winding is coupled to receive a proportionally opposite representation of the first leg of the input such that the first admittance is effectively decreased at operating frequencies thereby increasing a quality factor of the primary winding.  
     
     
       2. The high-Q on-chip inductor of  claim 1 , wherein the first admittance includes first self admittance and first coupled admittance and wherein the second admittance includes second self admittance and second coupled admittance. 
     
     
       3. The high-Q on-chip inductor of  claim 2 , wherein the auxiliary winding is proximally located to the primary winding to at least partially establish the first and second coupled admittances. 
     
     
       4. The high-Q on-chip inductor of  claim 2 , wherein the auxiliary winding is asymmetric with respect to the primary winding to at least partially establish the second admittance being greater than the first admittance. 
     
     
       5. The high-Q on-chip inductor of  claim 4 , wherein the asymmetry is achieved by at least one of: asymmetrical electromagnetic coupling between the primary winding and the auxiliary winding, asymmetrical number of turns between the primary winding and the auxiliary winding, and asymmetrical geometric configuration of the primary and auxiliary windings. 
     
     
       6. The high-Q on-chip inductor of  claim 1  further comprises a poly-silicon shield operably coupled to the primary winding and to the auxiliary winding. 
     
     
       7. The high-Q on-chip inductor of  claim 1  further comprises: 
       the primary winding including a plurality of turns on multiple dielectric layers of an integrated circuit, wherein the plurality of turns are operably coupled via bridges on differing dielectric layers of the integrated circuit; and  
       the auxiliary winding including at least one turn on at least one of the multiple dielectric layers of the integrated circuit.  
     
     
       8. The high-Q on-chip inductor of  claim 1  further comprises: 
       the primary winding including at least one turn on a first dielectric layer of an integrated circuit; and  
       the auxiliary winding including at least one turn on a second dielectric layer of the integrated circuit, wherein the at least one turn of the primary winding is stacked with respect to the at least one turn of the auxiliary winding.