US6819184B2ExpiredUtilityA1

RF transistor amplifier linearity using suppressed third order transconductance

91
Assignee: CREE MICROWAVE INCPriority: Nov 6, 2002Filed: Nov 6, 2002Granted: Nov 16, 2004
Est. expiryNov 6, 2022(expired)· nominal 20-yr term from priority
H03F 3/211H03F 1/3205H03F 3/602H03F 3/68H03F 1/32
91
PatentIndex Score
66
Cited by
14
References
19
Claims

Abstract

The linearity of a transistor amplifier comprising a plurality of transistors operating parallel is improved by reducing the odd order transconductance derivatives of signals generated by the transistors. The transistors can be provided in groups with each group having a different bias voltage applied thereto or each group of transistors can have a different input signal applied thereto. The groups of transistors can have different physical parameters such as the width to length ratio of gates in field effect transistors and threshold voltages for the transistors.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
       1. An RF power amplifier having improved linearity and operation comprising a plurality of transistors operating in parallel with different drive voltage and bias voltage applied to the transistors whereby positive and negative values of odd number transconductance derivatives from the plurality of transistors tend to cancel. 
     
     
       2. The RF power amplifier as defined by  claim 1  wherein the transistors have different bias voltages. 
     
     
       3. The RF power amplifier as defined by  claim 1  wherein the transistors have different input signals. 
     
     
       4. The RF power amplifier as defined by  claim 3  wherein phases of the input signals to the transistors differ. 
     
     
       5. The RF power amplifier as defined by  claim 4  wherein the transistors have different bias voltages. 
     
     
       6. The RF power amplifier as defined by  claim 4  wherein the transistors have different input voltages. 
     
     
       7. The RF power amplifier as defined by  claim 6  wherein the transistors have different bias voltages. 
     
     
       8. The RF power amplifier as defined by  claim 1  wherein the transistors are selected from the group consisting of field effect transistors and bipolar transistors. 
     
     
       9. The RF power amplifier as defined by  claim 8  wherein the field effect transistors and bipolar transistors include silicon and compound semiconductor material. 
     
     
       10. An RF power amplifier having improved linearity and operation comprising a plurality of transistors operating in parallel with physical parameters of the transistors differing whereby positive and negative values of odd number transconductance derivatives from the plurality of transistors tend to cancel. 
     
     
       11. The RF power amplifiers defined by  claim 10  wherein the transistors comprise field effect transistors having gates, the width to length ratios of the gates of the transistors differing. 
     
     
       12. The RF power amplifier as defined by  claim 10  wherein the transistors comprise field effect transistors, the voltage threshold of the transistors differing. 
     
     
       13. A method of improving the operating linearity of a multiple transistor power amplifier comprising the steps of: 
       a) providing a plurality of groups of transistors connected with a common output, and  
       b) operating the plurality of groups of transistors whereby positive and negative values of odd order transconductance derivatives of input signals tend to cancel.  
     
     
       14. The method as defined by  claim 13  wherein step b) includes altering the input signals as applied to the plurality of groups. 
     
     
       15. The method as defined by  claim 14  wherein step b) includes providing input signals having different phases as applied to the plurality of groups. 
     
     
       16. The method as defined by  claim 13  wherein step b) includes applying different bias voltages to the plurality of groups. 
     
     
       17. The method as defined by  claim 13  wherein step a) includes providing a plurality of groups of transistors having different physical parameters. 
     
     
       18. The method as defined by  claim 17  wherein the transistors are field effect transistors having gates, each group of transistors having a gate width to length ratio which differs from other groups. 
     
     
       19. The method as defined by  claim 18  wherein the transistors are field effect transistors, each group of transistors having threshold values that differ from other groups.

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