Active matrix substrate for a liquid crystal display and method of forming the same

Abstract

An active matrix substrate for a liquid crystal display and method of forming the same. To form the active matrix substrate five masks are needed. The first mask forms data lines on the transparent substrate. After forming a low k dielectric layer, the second mask forms contact windows therein. The third mask patterns pixel electrodes and conducting lines connecting sources and the data lines. The fourth mask patterns a metal layer/an insulating layer/a semiconductor layer/n-doped layer to form gate lines and TFTs on the low k dielectric layer. After depositing a passivating layer the fifth mask defines the passivating layer.

1. An active matrix substrate for a liquid crystal display, comprising:
 a transparent substrate having a plurality of active device regions and a plurality of pixel regions;  
 a plurality of data lines disposed on the transparent substrate, parallel to a first direction and having a plurality of protruding portions covering the active device regions;  
 a low k dielectric layer covering the data lines and the transparent substrate, the low k dielectric layer having a plurality of contact windows contacting the corresponding surfaces of the protruding portions of data lines;  
 a plurality of gate lines disposed on the low k dielectric layer, perpendicular to the first direction and having a plurality of protruding portions covering the active device regions, the data lines and the gate lines defining a plurality of regions including the active device regions and the pixel regions;  
 a gate-insulating layer disposed under the gate lines, contacting the gate lines and having the same pattern as the gate lines;  
 a semiconductor layer disposed between the gate-insulating layer and the low k dielectric layer, having the same pattern as the gate lines;  
 a plurality of sources and drains disposed between the semiconductor layer and the low k dielectric layer, wherein a channel exists between each source and its corresponding drain;  
 a plurality of pixel electrodes disposed on the low k dielectric layer at the pixel regions and contacting the drains;  
 a plurality of conducting lines connecting the data lines and the sources through the contact windows; and  
 a passivating layer disposed on the gate lines and the conducting lines.  
 
   
   
     2. The active matrix substrate for a liquid crystal display of  claim 1 , wherein the low k dielectric layer includes benzocyclobutene (BCB). 
   
   
     3. The active matrix substrate for a liquid crystal display of  claim 1 , wherein the conducting lines are located between the sources and the low k dielectric layer. 
   
   
     4. The active matrix substrate for a liquid crystal display of  claim 1 , wherein the pixel electrodes extend to regions between the drains and the low k dielectric layer. 
   
   
     5. The active matrix substrate for a liquid crystal display of  claim 4 , wherein the pixel electrodes extend to regions under parts of the gate lines and over parts of data lines. 
   
   
     6. The active matrix substrate for a liquid crystal display of  claim 1 , wherein the pixel electrodes and the conducting lines include indium tin oxide (ITO). 
   
   
     7. A method of fabricating an active matrix substrate for a liquid crystal display, comprising:
 providing a transparent substrate having a plurality of active device regions and a plurality of pixel regions;  
 forming a plurality of data lines on the transparent substrate, parallel to a first direction and having a plurality of protruding portions covering the active device regions;  
 forming a low k dielectric layer on the data lines and the transparent substrate;  
 forming a plurality of contact windows in the low k dielectric layer, exposing the corresponding surfaces of the protruding portions of data lines;  
 forming a plurality of pixel electrodes on the low k dielectric layer and a plurality of conducting lines contacting the data lines through the contact windows;  
 forming an n-doped layer on the pixel electrodes and the conducting lines;  
 forming a semiconductor layer on the n-doped layer and the low k dielectric layer;  
 forming an insulating layer on the semiconductor layer;  
 forming a metal layer on the insulating layer;  
 defining the n-doped layer, the semiconductor layer, the insulating layer and the metal layer, the n-doped layer becoming a plurality of sources and drains, the insulating layer becoming a gate-insulating layer, the metal layer becoming a plurality of gate lines perpendicular to a first direction; and  
 forming a passivating layer on the gate lines and the conducting lines.  
 
   
   
     8. The method of  claim 7 , wherein the low k dielectric layer includes benzocyclobutene (BCB). 
   
   
     9. The method of  claim 7 , wherein the pixel electrodes extend to regions under parts of the gate lines and over parts of data lines. 
   
   
     10. The method of  claim 7 , wherein the pixel electrodes and the conducting lines include indium tin oxide (ITO). 
   
   
     11. The method of  claim 10 , wherein the n-doped layer is formed by plasma treating the surface of the ITO with PH 3 . 
   
   
     12. The method of  claim 7 , wherein the method of forming an n-doped layer, the pixel electrodes and the conducting lines comprises:
 forming a transparent conducting layer on the low k dielectric layer;  
 depositing a layer of n-doped material; and  
 etching the layer of n-doped material and the transparent conducting layer.  
 
   
   
     13. The method of  claim 7 , wherein the passivaing layer is a silicon nitride layer.