Methods and apparatus for using Taylor series expansion concepts to substantially reduce nonlinear distortion

Abstract

Methods and apparatus are provided for substantially reducing and/or canceling nonlinearities of any order in circuits, devices, and systems such as amplifiers and mixers. In particular, methods and apparatus are provided for substantially reducing and/or canceling third order nonlinearities in circuits, devices, and systems such as amplifiers and mixers. A first coupler is used to split an input signal into two equal-amplitude in-phase components, each component is processed by two nonlinear devices with different nonlinearities, and a final combiner, such as a 180-degree hybrid, recombines the processed signals 180 degrees out of phase and substantially reduces and/or cancels the undesired nonlinear distortion components arising due to nonlinearities in the nonlinear devices.

1. An apparatus for substantially reducing nonlinear distortion, the apparatus comprising:
 a nonlinear device having an input and an output, the nonlinear device having a Taylor series expansion describing an output current, i 0 , in terms of an input voltage, v, as i 0 =b 0 +b 1 v+b 2 v 2 +b 3 v 3 +b 4 v 4  . . . ; and  
 a nonlinear load having an input in communication with the output of the nonlinear device and in communication with a final output, the nonlinear load has a Taylor series expansion describing a current through the nonlinear load, i L , in terms of a terminal voltage, v L , as i L =a 0 +a 1 v L +a 2 v L   2 +a 3 v L   3 +a 4 v L   4 , such that the nonlinear device and the nonlinear load are provided such that most nearly b 0 =a 0 , b 1 =ca 1 , b 2 =c 2 a 2 , b 3 =c 3 a 3 , b n =c n a n  where, c, is a constant, wherein the output of the nonlinear device substantially reduces nonlinearities of the nonlinear device and the nonlinear load.  
 
   
   
     2. The apparatus of  claim 1 , wherein the nonlinear device further comprises:
 a first n-channel field effect transistor (FET) having a gate in communication with an input source, a source and well in communication with ground, and a drain in electrical communication with an output, and,  
 wherein the nonlinear load further comprises:  
 a second n-channel FET having a source and well in electrical communication with the drain of the first n-channel FET, and a gate and drain in common electrical communication; and  
 a third n-channel FET having a source and well in electrical communication with the drain of the second n-channel FET, and a gate and drain in common electrical communication with a power supply.  
 
   
   
     3. The apparatus of  claim 1 , wherein the nonlinear device further comprises:
 a first npn bipolar junction transistor (BJT) having a base in electrical communication with an input source, an emitter in electrical communication with ground and a collector in electrical communication with an output, and  
 wherein the nonlinear load further comprises:  
 a second npn BJT having an emitter in electrical communication with the collector of the first npn BJT, and a base and collector in common electrical communication; and  
 a third npn BJT having an emitter in electrical communication with a collector of the second npn BJT, and a base and collector in common electrical communication with a power supply.  
 
   
   
     4. A method for substantially reducing nonlinear distortion in an apparatus, the method comprising the steps of:
 applying an input voltage to a nonlinear device, the nonlinear device having a Taylor series expansion describing an output current, i o , in terms of an input voltage, v, as i o =b 0 +b 1 v+b 2 v 2 +b 3 v 3 +b 4 v 4  . . . ;  
 coupling an output current of the nonlinear device to a nonlinear load, the nonlinear load having a Taylor series expansion describing current through the nonlinear load, i L , in terms of a terminal voltage, v L , as i L =a 0 +a 1 v L +a 2 v L   2 +a 3 v L   3 +a 4 v L   4  . . . , and the nonlinear device and the nonlinear load are provided such that most nearly b 0 =a 0 , b 1 =ca 1 , b 2 =c 2 a 2 , b 3 =c 3 a 3 , . . . , b n =c n a n  where, c, is a constant; and  
 
     outputting the terminal voltage at the nonlinear load to substantially reduce nonlinear terms and nonlinear signal distortion.