US6858491B1ExpiredUtility

Method of manufacturing the semiconductor device having a capacitor formed in SOI substrate

70
Assignee: TOSHIBA KKPriority: Jun 26, 2001Filed: Aug 22, 2003Granted: Feb 22, 2005
Est. expiryJun 26, 2021(expired)· nominal 20-yr term from priority
Inventors:Koichi Kokubun
H10D 86/201H10D 1/665H10B 12/0387H10B 12/09
70
PatentIndex Score
15
Cited by
4
References
12
Claims

Abstract

A semiconductor manufacturing method wherein a trench is formed in an SOI substrate. A first insulating film is formed in the trench, wherein the first insulating film has a depth to reach an upper surface of a buried insulating film. A second insulating film is formed in a sidewall portion of the trench above the first insulating film, wherein the second insulating film is made of a material different from that of the first insulating film. The first insulating film is etched backed to a depth as to reach an upper surface of the buried insulating film, by using the second insulating film as a mask. The buried insulating film, exposed to the sidewall portion of the trench, is recessed. An epitaxial layer is formed in a gap created by the recessed buried insulating film. The first and second insulating films are removed, and a trench capacitor is formed in the trench.

Claims

exact text as granted — not AI-modified
1. A method of manufacturing a semiconductor device, comprising:
 forming a trench in an SOI substrate, the trench extending from a major surface of the SOI substrate and passing through a buried insulating film;  
 forming a first insulating film in the trench, a first insulating film with a depth to reach an upper surface of the buried insulating film;  
 forming a second insulating film in a sidewall portion of the trench above the first insulating film, the second insulating film made of a material different from that of the first insulating film;  
 etching back the first insulating film to such a depth as to reach an upper surface of the buried insulating film, using the second insulating film as a mask, and recessing the buried insulating film exposed to the sidewall portion of the trench;  
 forming a semiconductor layer by epitaxial growth in a gap created by the recessed buried insulating film; and  
 removing the first insulating film and the second insulating film and forming a trench capacitor in the trench.  
 
   
   
     2. A method according to clam  1 , further comprising forming a first transistor in the SOI substrate, wherein the first transistor and the trench capacitor form a DRAM memory cell. 
   
   
     3. A method according to  claim 2 , further comprising forming a second transistor in the SOI substrate, wherein the second transistor forms a logic circuit. 
   
   
     4. A method according to  claim 3 , wherein at least a part of a manufacturing process of the transistor forming the DRAM memory cell is common to that of the transistor forming the logic circuit. 
   
   
     5. A method according to  claim 1 , further comprising forming a second transistor in the SOI substrate, wherein the second transistor forms a logic circuit. 
   
   
     6. A method according to  claim 1 , wherein the SOI substrate is formed by bonding oxide film sides of two semiconductor substrates each having the oxide film on one surface thereof. 
   
   
     7. A method of manufacturing a semiconductor device, comprising:
 forming a trench in an SOI substrate, the trench extending from a major surface of the SOI substrate and passing through a buried insulating film;  
 forming a first insulating film in the trench, the first insulating film with a depth to reach an upper surface of the buried insulating film;  
 forming a second insulating film in a sidewall portion of the trench above the first insulating film, the second insulating film made of a material different from that of the first insulating film;  
 etching back the first insulating film to such a depth as to reach an upper surface of the buried insulating film, using the second insulating film as a mask, and recessing the buried insulating film exposed to the sidewall portion of the trench;  
 depositing a polysilicon layer on a major surface of the SOI substrate and in the trench;  
 etching back the polysilicon layer by performing anisotropy etching to cause the polysilicon layer to remain in a gap created by the recessed buried insulating film in the trench; and  
 removing the first insulating film and a second insulating film and forming a trench capacitor in the trench.  
 
   
   
     8. A method according to  claim 7 , further comprising forming a first transistor in the SOI substrate, wherein the first transistor and the trench capacitor form a DRAM memory cell. 
   
   
     9. A method according to  claim 8 , further comprising forming a second transistor in the SOI substrate, wherein the second transistor forms a logic circuit. 
   
   
     10. A method according to  claim 9 , wherein at least a part of a manufacturing process of the transistor forming the DRAM memory cell is common to that of the transistor forming the logic circuit. 
   
   
     11. A method according to  claim 7 , further comprising forming a second transistor in the SOI substrate, wherein the second transistor forms a logic circuit. 
   
   
     12. A method according to  claim 7 , wherein the SOI substrate is formed by bonding oxide film sides of two semiconductor substrates each having the oxide film on one surface thereof.

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