US6867444B1ExpiredUtility

Semiconductor substrate incorporating a neutron conversion layer

86
Assignee: US NAVYPriority: Oct 20, 2003Filed: Oct 20, 2003Granted: Mar 15, 2005
Est. expiryOct 20, 2023(expired)· nominal 20-yr term from priority
H10F 77/10H10F 30/29H10F 30/301G01T 3/08
86
PatentIndex Score
42
Cited by
12
References
20
Claims

Abstract

A semiconductor substrate incorporating a neutron conversion layer (such as boron-10) that is sensitive enough to permit the counting of single neutron events. The substrate includes an active semiconductor device layer, a base substrate, an insulating layer provided between the active semiconductor device layer and the base substrate, and a neutron conversion layer provided between the active semiconductor device layer and the base substrate. The neutron conversion layer is located within the insulating layer, between the insulating layer and the base substrate or between the active semiconductive device layer and the insulating layer. A barrier layer is provided between at least one of the neutron conversion layer and the active semiconductor device layer and the neutron conversion layer and the base substrate to prevent diffusion of the neutron conversion material provided in the neutron conversion layer. Further, a plurality of trenches may be formed in the active semiconductor device layer. In such a case, a trench neutron conversion layer is formed in at least one of the trenches to improve device sensitivity.

Claims

exact text as granted — not AI-modified
1. A semiconductor substrate comprising:
 an active semiconductor device layer;  
 a base substrate;  
 an insulating layer provided between the active semiconductor device layer and the base substrate; and  
 a neutron conversion layer provided between the active semiconductor device layer and the base substrate.  
 
   
   
     2. A semiconductor substrate as claimed in  claim 1 , wherein the neutron conversion layer is located within the insulating layer. 
   
   
     3. A semiconductor substrate as claimed in  claim 2 , wherein a barrier layer is provided between at least one of the neutron conversion layer and the active semiconductor device layer and the neutron conversion layer and the base substrate. 
   
   
     4. A semiconductor substrate as claimed in  claim 2 , further comprising a plurality of trenches formed in the active semiconductor device layer and a trench neutron conversion layer formed in at least one of the trenches. 
   
   
     5. A semiconductor substrate as claimed in  claim 4 , further comprising a trench insulating layer and a trench barrier layer formed between trench neutron converting layer and the active semiconductor device layer. 
   
   
     6. A semiconductor substrate as claimed in  claim 1 , wherein the neutron conversion layer is located between the insulating layer and the base substrate. 
   
   
     7. A semiconductor substrate as claimed in  claim 6 , wherein a barrier layer is provided between at least one of the neutron conversion layer and the active semiconductor device layer and the neutron conversion layer and the base substrate. 
   
   
     8. A semiconductor substrate as claimed in  claim 6 , further comprising a plurality of trenches formed in the active semiconductor device layer and a trench neutron conversion layer formed in at least one of the trenches. 
   
   
     9. A semiconductor substrate as claimed in  claim 8 , further comprising a trench insulating layer and a trench barrier layer formed between trench neutron converting layer and the active semiconductor device layer. 
   
   
     10. A semiconductor substrate as claimed in  claim 6 , further comprising a plurality of trenches formed in the active semiconductor device layer and a trench neutron conversion layer formed in at least one of the trenches. 
   
   
     11. A semiconductor substrate as claimed in  claim 10 , further comprising a trench insulating layer and a trench barrier layer formed between trench neutron converting layer and the active semiconductor device layer. 
   
   
     12. A semiconductor substrate as claimed in  claim 1 , wherein the neutron conversion layer is located between the active semiconductive device layer and the insulating layer. 
   
   
     13. A semiconductor substrate as claimed in  claim 12 , wherein a barrier layer is provided between at least one of the neutron conversion layer and the active semiconductor device layer and the neutron conversion layer and the base substrate. 
   
   
     14. A semiconductor substrate as claimed in  claim 1 , further comprising a plurality of trenches formed in the active semiconductor device layer and a trench neutron conversion layer formed in at least one of the trenches. 
   
   
     15. A semiconductor substrate as claimed in  claim 14 , further comprising a trench insulating layer and a trench barrier layer formed between trench neutron converting layer and the active semiconductor device layer. 
   
   
     16. A semiconductor substrate as claimed in  claim 1 , wherein the neutron conversion layer includes boron-10. 
   
   
     17. A semiconductor substrate as claimed in  claim 16 , further comprising a trench insulating layer and a barrier layer formed between the trench neutron conversion layer and the active semiconductor layer. 
   
   
     18. A semiconductor substrate comprising:
 an active semiconductor layer;  
 a base substrate;  
 an insulating layer formed between the active semiconductor layer and the base substrate;  
 a plurality of isolation trenches formed in the active semiconductor layer; and  
 a trench neutron conversion layer formed in at least one of the trenches.  
 
   
   
     19. A semiconductor substrate as claimed in  claim 18 , wherein the trench neutron conversion layer comprises boron-10. 
   
   
     20. A method of manufacturing a semiconductor substrate comprising:
 forming an active semiconductor device layer on a base substrate;  
 forming an insulating layer between the active semiconductor device layer and the base substrate; and  
 forming a neutron conversion layer between the active semiconductor device layer and the bas substrate.

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