P
US6910264B2ExpiredUtilityPatentIndex 71

Method for making a multilayer circuit board having embedded passive components

Assignee: PHOENIX PREC TECHNOLOGY CORPPriority: Jan 3, 2003Filed: Jan 3, 2003Granted: Jun 28, 2005
Est. expiryJan 3, 2023(expired)· nominal 20-yr term from priority
Inventors:TUNG I-CHUNG
Y10T29/49117Y10T29/49002H05K 2201/09036H05K 2201/0355H05K 3/4623Y10T29/49144H05K 2201/09672H05K 1/0219H05K 1/095H05K 2203/0723H05K 1/024H05K 2201/09781Y10T29/49165H05K 3/4602H05K 1/162H05K 2203/0361H05K 1/167H05K 2201/0187H05K 2203/0338Y10T29/49126Y10T29/4913
71
PatentIndex Score
10
Cited by
6
References
22
Claims

Abstract

A method for fabricating a core circuit board having passive components, such as resistors, capacitors and inductors, is disclosed, which can be used to construct a multilayer circuit board having embedded passive components. In making such as a core circuit board, a resistive film which is a continuous or non-continuous is first formed on one side of a conductive foil. Two such conductive foils are laminated onto a high dielectric layer. The electrodes for various passive components or spiral coils for the inductive components and electrical circuit pattern are finally made on the same conductive foils simultaneously. Finally, a core circuit board having passive components for further making a multilayer circuit board is thus constructed.

Claims

exact text as granted — not AI-modified
1. A method of making a core circuit board for making a multilayer circuit board having embedded passive components comprising the steps of:
 providing two electrically conductive foils;  
 depositing at least one resistive film on the surface of at least one of said two electrically conductive foils;  
 laminating said two electrically conductive foils onto opposite sides of a high dielectric layer respectively to form a core board; and  
 etching said electrically conductive foils of said core board to form electrodes of a resistor and a capacitor.  
 
     
     
       2. The method of  claim 1 , wherein said electrically conductive foil is made of metal selected from a group of copper, aluminum and the alloy thereof. 
     
     
       3. The method of  claim 1 , wherein the surface of said electrically conductive foil is partially covered by said resistive film. 
     
     
       4. The method of  claim 1 , wherein said resistive film is made of metal alloy selected from a group of Ni—Cr, Ni—Sn, Ni—P, Cr—Si and Ta—N alloy. 
     
     
       5. The method of  claim 1 , wherein said resistive film is made of a polymer filled with electrically conductive filler. 
     
     
       6. The method of  claim 5 , wherein said electrically conductive filler is selected from a group of electrically conductive ceramic particles and metallic particles. 
     
     
       7. The method of  claim 1 , wherein said high dielectric layer is made of a material with the dielectric constant larger than 4.0. 
     
     
       8. A method of making a core circuit board for making a multilayer circuit board having embedded passive components comprising the steps of:
 providing two electrically conductive foils;  
 depositing at least one resistive film on the surface of at least one of said two electrically conductive foils;  
 laminating said two electrically conductive foils onto opposite sides of a high dielectric layer respectively to form a core board;  
 etching said electrically conductive foils of said core board to form electrodes of two capacitors; and  
 depositing at least one insulating material in between said two capacitors.  
 
     
     
       9. The method of  claim 8 , wherein said electrically conductive foil is composed of metal selected from a group of copper, aluminum and the alloy thereof. 
     
     
       10. The method of  claim 8 , wherein the surface of said electrically conductive foil is partially covered by said resistive film. 
     
     
       11. The method of  claim 8 , wherein said resistive film is made of metal alloy selected from a group of Ni—Cr, Ni—Sn, Ni—P, Cr—Si and Ta—N alloy. 
     
     
       12. The method of  claim 8 , wherein said resistive film is made of a polymer filled with electrically conductive filler. 
     
     
       13. The method of  claim 12 , wherein said electrically conductive filler is selected from a group of electrically conductive ceramic particles and metallic particles. 
     
     
       14. The method of  claim 8 , wherein said high dielectric layer is made of material with the dielectric constant larger than 4.0. 
     
     
       15. The method of  claim 8 , said insulating material is a material selected from a group of polymeric material, polymer composite material and ceramic material. 
     
     
       16. A method of making a core circuit board for making a multilayer circuit board having embedded passive components comprising the steps of:
 providing two electrically conductive foils;  
 depositing at least one resistive film on the surface of at least one of said two electrically conductive foils;  
 laminating said two electrically conductive foils onto opposite sides of a high dielectric layer respectively to form a core board;  
 etching said electrically conductive foils of said core board to form electrodes of two capacitors; and  
 depositing an electrically conductive material in between said two capacitors in said high dielectric layer.  
 
     
     
       17. The method of  claim 16 , wherein said electrically conductive foil is composed of metal selected from a group of copper, aluminum and the alloy thereof. 
     
     
       18. The method of  claim 16 , wherein the surface of said electrically conductive foil is partially covered by said resistive film. 
     
     
       19. The method of  claim 16 , wherein said resistive film is made of metal alloy selected from a group of Ni—Cr, Ni—Sn, Ni—P, Cr—Si and Ta—N alloy. 
     
     
       20. The method of  claim 16 , wherein said resistive film is made of a polymer filled with electrically conductive filler. 
     
     
       21. The method of  claim 20 , wherein said electrically conductive filler is selected from a group of electrically conductive ceramic particles and metallic particles. 
     
     
       22. The method of  claim 16 , wherein said high dielectric layer is made of a material with the dielectric constant larger than 4.0.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.