Method for manufacturing semiconductor device

Abstract

Provided is a manufacturing method of a semiconductor device, which comprises exposing a surface of a semiconductor substrate on which a heterocrystalline layer is to be grown inside of a second emitter opening portion of a hetero-junction bipolar transistor, removing water by preheat treatment in a reducing gas atmosphere, subjecting the substrate to second heat treatment in a reducing gas atmosphere at a temperature which is higher than the preheating treatment but does not adversely affect the impurity concentration distribution of another element on the semiconductor substrate, thereby removing an oxide film formed on the surface on which the heterocrystalline layer is to be grown, and then selectively causing epitaxial growth of the heterocrystalline layer on the thus cleaned surface in the second emitter opening portion. According to the present invention, reliability of a semiconductor device having a hetero-junction bipolar transistor can be improved.

1. A method of manufacturing a semiconductor device, comprising steps of:
 (a) forming an isolation portion in a main surface of a semiconductor substrate;  
 (b) forming a first insulating film over an active region encompassed by the isolation portion of the semiconductor substrate;  
 (c) forming a second insulating film over the main surface of the semiconductor substrate after the step (b);  
 (d) depositing a base electrode formation film over the second insulating film;  
 (e) introducing an oxidation promoting impurity into an upper layer portion of the base electrode formation film;  
 (f) depositing a third insulating film over the base electrode formation film;  
 (g) removing a portion of the third insulating film and base electrode formation film to form a first emitter opening portion;  
 (h) oxidizing the semiconductor substrate to form a fourth insulating film over a side surface of the base electrode formation film and a corner portion thereof on a side in contact with the third insulating film, each inside of the first emitter opening portion;  
 (i) wet-etching the semiconductor substrate to remove the second insulating film through the first emitter opening portion, thereby forming a second emitter opening portion which is opened so that a side surface of the second insulating film is kept apart from the side surface of the base electrode formation film inside of the first emitter opening portion and from which a portion of the base electrode formation film is exposed;  
 (j) washing the resulting semiconductor substrate with hydrofluoric acid to remove the first insulating film exposed from the second emitter opening portion;  
 (k) heat treating the semiconductor substrate in a reducing gas atmosphere; and  
 (l) selectively forming, by the epitaxial method, a heterocrystalline layer over the semiconductor substrate exposed from the second emitter opening portion.  
 
   
   
     2. A method according to  claim 1 , wherein the oxidation promoting impurity in the step (e) is boron difluoride, arsenic, oxygen, silicon or germanium. 
   
   
     3. A method according to  claim 1 , wherein the third insulating film of the step (f) is formed by chemical vapor deposition using plasma. 
   
   
     4. A method according to  claim 1 , wherein the heat treatment in the reducing gas atmosphere in the step (k) has a first heat treatment step in which the semiconductor substrate is heat treated at a first temperature and a second heat treatment step in which the semiconductor substrate after the first heat treatment step is heat treated at a second temperature higher than the first temperature. 
   
   
     5. A method according to  claim 4 , wherein the first temperature is a temperature not causing elimination of hydrogen bonded to the surface of the semiconductor substrate on which a heterocrystalline layer is to be grown. 
   
   
     6. A method according to  claim 4 , wherein the second temperature is a temperature not adversely affecting another element formed on the semiconductor substrate. 
   
   
     7. A method according to  claim 1 , further comprising the steps of, after the step ( 1 ):
 (m) after removal of the fourth insulating film, depositing a fifth insulating film over the main surface of the semiconductor substrate including the inside of the first emitter opening portion;  
 (n) after deposition of a first emitter electrode formation film over the fifth insulating film, etching back the first emitter electrode formation film to leave the first emitter electrode formation film over a side surface side of the first emitter opening portion;  
 (o) removing the fifth insulating film by etching with the first emitter electrode formation film left by the etching back step as a mask, thereby exposing the heterocrystalline layer from the first emitter opening portion;  
 (p) after deposition of a second emitter electrode formation film over the main surface of the semiconductor substrate including the inside of the first emitter opening portion, patterning the second emitter electrode formation film to form an emitter electrode;  
 (q) after the step (p), patterning the base electrode formation film to form a base electrode; and  
 (r) after the step (q), heat treating the semiconductor substrate to diffuse an impurity in the emitter electrode to the heterocrystalline layer, thereby forming an emitter region.  
 
   
   
     8. A method according to  claim 7 , further comprising the steps of:
 after the step (a) but prior to the step (c), forming a gate insulating film of a field effect transistor over the semiconductor substrate in a field effect transistor formation region of the semiconductor substrate, forming a gate electrode over the gate insulating film, forming over the semiconductor substrate a first semiconductor region for source and drain of the field effect transistor and forming a sidewall insulating film over the side surface of the gate electrode;  
 after the step (q) but prior to the step (r), introducing an impurity for the formation of a second semiconductor region which is for source and drain of the field effect transistor and has a higher impurity concentration than the first semiconductor region; and  
 in the step (r), simultaneously with the formation of the emitter region, activating the second semiconductor region of the field effect transistor.  
 
   
   
     9. A method according to  claim 8 , wherein the gate electrode formation step comprises the steps of:
 depositing a gate electrode formation film over the main surface of the semiconductor substrate after the formation of the gate insulating film,  
 introducing, in an n channel type field effect transistor formation region of the gate electrode formation film, an impurity for making the conductivity type of a gate electrode n-type,  
 introducing, in a p channel type field effect transistor formation region of the gate electrode formation film, an impurity for making the conductivity type of a gate electrode to p-type, and  
 patterning the gate electrode formation film to form an n type gate electrode in the formation region of the n channel type field effect transistor and a p type gate electrode in the formation region of the p channel type field effect transistor.  
 
   
   
     10. A method according to  claim 7 , further comprising the steps of, after the step (r), forming a conductor film over the main surface of the semiconductor substrate and heat treating the semiconductor substrate to form a silicide layer on at least a contact portion between the conductor film and emitter electrode, and conductor film and base electrode. 
   
   
     11. A method of manufacturing a semiconductor device, comprising steps of:
 (a) forming an isolation portion in a main surface of a semiconductor substrate;  
 (b) forming a first insulating film over an active region encompassed by the isolation portion of the semiconductor substrate;  
 (c) forming a second insulating film over the main surface of the semiconductor substrate after the step (b);  
 (d) depositing a base electrode formation film over the second insulating film;  
 (e) depositing a third insulating film over the base electrode formation film;  
 (f) removing a portion of the third insulating film and base electrode formation film to form a first emitter opening portion;  
 (g) oxidizing the semiconductor substrate to form a fourth insulating film over a side surface of the base electrode formation film inside of the first emitter opening portion;  
 (h) wet etching the semiconductor substrate to remove the second insulating film through the first emitter opening portion, thereby forming a second emitter opening portion which is opened so that a side surface of the second insulating film is kept apart from the side surface of the base electrode formation film inside of the first emitter opening portion and from which a portion of the base electrode formation film is exposed;  
 (i) washing the semiconductor substrate with hydrofluoric acid to remove the first insulating film exposed from the second emitter opening portion;  
 (j) subjecting the semiconductor substrate to first heat treatment at a first temperature in a reducing gas or non-oxidizing gas atmosphere;  
 (k) after the step (j), subjecting the semiconductor substrate to second heat treatment at a second temperature higher than the first temperature in a reducing gas atmosphere; and  
 (l) after the step (k), selectively forming, by the epitaxial method, a heterocrystalline layer over the semiconductor substrate exposed from the second emitter opening portion.  
 
   
   
     12. A method according to  claim 11 , wherein the first temperature in the step (j) is a temperature not causing elimination of hydrogen bonded to the surface of the semiconductor substrate on which a heterocrystalline layer is to be grown. 
   
   
     13. A method according to  claim 11 , wherein the second temperature in the step (k) is a temperature not adversely affecting another element formed on the semiconductor substrate. 
   
   
     14. A method according to  claim 11 , further comprising the steps of, after the step ( 1 ):
 (m) after removal of the fourth insulating film, depositing a fifth insulating film over the main surface of the semiconductor substrate including the inside of the first emitter opening portion;  
 (n) after deposition of a first emitter electrode formation film over the fifth insulating film, etching back the first emitter electrode formation film to leave the first emitter electrode formation film over a side surface side of the first emitter opening portion;  
 (o) removing the fifth insulating film by etching with the first emitter electrode formation film left by the etching back step as a mask, thereby exposing the heterocrystalline layer from the first emitter opening portion;  
 (p) after deposition of a second emitter electrode formation film over the main surface of the semiconductor substrate including the inside of the first emitter opening portion, patterning the second emitter electrode formation film to form an emitter electrode;  
 (q) after the step (p), patterning the base electrode formation film to form a base electrode; and  
 (r) after the step (q), heat treating the semiconductor substrate to diffuse an impurity in the emitter electrode to the heterocrystalline layer, thereby forming an emitter region.  
 
   
   
     15. A method according to  claim 14 , further comprising the steps of:
 after the step (a) but prior to the step (c), forming a gate insulating film of a field effect transistor over the semiconductor substrate in the field effect transistor formation region of the semiconductor substrate, forming a gate electrode over the gate insulating film, forming over the semiconductor substrate a first semiconductor region for source and drain of the field effect transistor, and forming a sidewall insulating film over the side surface of the gate electrode;  
 after the step (q) but prior to the step (r), introducing an impurity for the formation of a second semiconductor region which is for source and drain of the field effect transistor and has a higher impurity concentration than the first semiconductor region; and  
 in the step (r), simultaneously with the formation of the emitter region, activating the second semiconductor region of the field effect transistor.  
 
   
   
     16. A method according to  claim 15 , wherein the gate electrode formation step comprises the steps of:
 depositing a gate electrode formation film over the main surface of the semiconductor substrate after the formation of the gate insulating film;  
 introducing, in an n channel type field effect transistor formation region of the gate electrode formation film, an impurity for making the conductivity type of the gate electrode to n-type;  
 introducing, in a p channel type field effect transistor formation region of the gate electrode formation film, an impurity for making the conductivity type of the gate electrode to p-type; and  
 patterning the gate electrode formation film to form an n type gate electrode in the formation region of the n channel type field effect transistor and a p type gate electrode in the formation region of the p channel type field effect transistor.  
 
   
   
     17. A method of manufacturing a semiconductor device, comprising steps of:
 (a) forming an isolation portion on a main surface of a semiconductor substrate;  
 (b) forming a first insulating film over an active region encompassed by the isolation portion of the semiconductor substrate;  
 (c) forming a second insulating film over the main surface of the semiconductor substrate after the step (b);  
 (d) depositing a base electrode formation film over the second insulating film;  
 (e) depositing a third insulating film over the base electrode formation film by chemical vapor deposition using plasma;  
 (f) removing a portion of the third insulating film and base electrode formation film to form a first emitter opening portion;  
 (g) oxidizing the semiconductor substrate to form a fourth insulating film over a side surface of the base electrode formation film inside of the first emitter opening portion;  
 (h) wet-etching the semiconductor substrate to remove the second insulating film through the first emitter opening portion, thereby forming a second emitter opening portion which is opened so that the side surface of the second insulating film is kept apart from the side surface of the base electrode formation film inside of the first emitter opening portion and from which a portion of the base electrode formation film is exposed;  
 (i) washing the semiconductor substrate with hydrofluoric acid to remove the first insulating film exposed from the second emitter opening portion;  
 (j) heat treating the semiconductor substrate in a reducing gas atmosphere; and  
 (k) selectively forming, by an epitaxial method, a heterocrystalline layer over the semiconductor substrate exposed from the second emitter opening portion.  
 
   
   
     18. A method according to  claim 17 , wherein the heat treatment in the reducing gas atmosphere in the step (j) has a first heat treatment step in which the semiconductor substrate is heat treated at a first temperature and a second heat treatment step in which the semiconductor substrate after the first heat treatment step is heat treated at a second temperature higher than the first temperature. 
   
   
     19. A method according to  claim 18 , wherein the first temperature is a temperature not causing elimination of hydrogen bonded to the surface of the semiconductor substrate on which a heterocrystalline layer is to be grown. 
   
   
     20. A method according to  claim 18 , wherein the second temperature is a temperature not adversely affecting another element formed on the semiconductor substrate. 
   
   
     21. A method according to  claim 17 , further comprising the steps of, after the step (k):
 (l) after removal of the fourth insulating film, depositing a fifth insulating film over the main surface of the semiconductor substrate including the inside of the first emitter opening portion;  
 (m) after deposition of a first emitter electrode formation film over the fifth insulating film, etching back the first emitter electrode formation film to leave the first emitter electrode formation film over a side surface side of the first emitter opening portion;  
 (n) removing the fifth insulating film by etching with the first emitter electrode formation film left by the etching back step as a mask, thereby exposing the heterocrystalline layer from the first emitter opening portion;  
 (o) after deposition of a second emitter electrode formation film over the main surface of the semiconductor substrate including the inside of the first emitter opening portion, patterning the second emitter electrode formation film to form an emitter electrode;  
 (p) after the step (o), patterning the base electrode formation film to form a base electrode; and  
 (q) after the step (p), heat treating the semiconductor substrate to diffuse an impurity in the emitter electrode to the heterocrystalline layer, thereby forming an emitter region.  
 
   
   
     22. A method according to  claim 21 , further comprising the steps of:
 after the step (a) but prior to the step (c), forming a gate insulating film of a field effect transistor over the semiconductor substrate in a field effect transistor formation region of the semiconductor substrate, forming a gate electrode over the gate insulating film, forming over the semiconductor substrate a first semiconductor region for source and drain of the field effect transistor, and forming a sidewall insulating film over the side surface of the gate electrode;  
 after the step (p) but prior to the step (q), introducing an impurity for the formation of a second semiconductor region which is for source and drain of the field effect transistor and has a higher impurity concentration than the first semiconductor region; and  
 in the step (q), simultaneously with the formation of the emitter region, activating the second semiconductor region of the field effect transistor.  
 
   
   
     23. A method according to  claim 22 , wherein the gate electrode formation step comprises the steps of:
 depositing a gate electrode formation film over the main surface of the semiconductor substrate after the formation of the gate insulating film;  
 introducing, in an n channel type field effect transistor formation region of the gate electrode formation film, an impurity for making the conductivity type of the gate electrode to n-type;  
 introducing, in a p channel type field effect transistor formation region of the gate electrode formation film, an impurity for making the conductivity type of the gate electrode to p-type; and  
 patterning the gate electrode formation film to form an n type gate electrode in the n channel type field effect transistor formation region and a p type gate electrode in the p channel type field effect transistor formation region.