Liquid crystal display

Abstract

A liquid crystal display (LCD) including a first substrate and a second substrate. A plurality of gate lines and data lines are formed on the first substrate perpendicular to each other to define a plurality of pixel regions. A thin film transistor is formed for every one pixel. A common electrode is formed on the second substrate. A gate pad, a data pad, and a common electrode pad electrically are connected to each of the gate lines, data lines, and common electrodes respectively. A data on/off pad is formed between adjacent data pads in substantially the same pattern as the data pad for testing a data signal applied to the pixel region. A gate on/off pad is formed between adjacent gate pads in substantially the same pattern as the gate pad for testing a gate signal applied to the pixel region. A common electrode on/off pad is provided for testing a common electrode signal applied to the pixel region. The LCD thereby prevents damage from a rubbing cloth caused by the spacing between the on/off pads, to improve a picture quality.

1. A liquid crystal display (LCD) comprising:
 a first substrate and a second substrate;  
 a plurality of gate lines and data lines formed on the first substrate perpendicular to each other to define a plurality of pixel regions;  
 a thin film transistor formed for every one pixel;  
 a common electrode on the second substrate;  
 a gate pad, a data pad, and a common electrode pad electrically connected to each of the gate lines, data lines, and common electrodes, respectively;  
 a data on/off pad between adjacent data pads in substantially the same pattern as the data pad for testing a data signal applied to the pixel region;  
 a gate on/off pad between adjacent gate pads in substantially the same pattern as the gate pad for testing a gate signal applied to the pixel region; and,  
 a common electrode on/off pad for testing a common electrode signal applied to the pixel region.  
 
     
     
       2. An LCD as claimed in  claim 1 , wherein a pitch between the data pad and the data on/off pad is substantially identical to the pitch between the data pads. 
     
     
       3. An LCD as claimed in  claim 1 , wherein the gate on/off pad has a pattern substantially identical to the pattern of the gate pad. 
     
     
       4. An LCD as claimed in  claim 3 , wherein a pitch between the gate pad and the gate on/off pad is substantially identical to the pitch between the gate pads. 
     
     
       5. An LCD as claimed in  claim 1 , wherein each of the gate on/off pad, the data on/off pad, and the common electrode on/off pad include a transparent conductive material. 
     
     
       6. An LCD as claimed in  claim 5 , wherein the transparent conductive material includes indium tin oxide. 
     
     
       7. An LCD as claimed in  claim 1 , wherein the thin film transistor includes;
 a gate electrode connected with a gate line;  
 a gate insulating film on an entire surface of the substrate inclusive of the gate electrode;  
 a semiconductor layer on the gate insulating film;  
 an ohmic contact layer on the semiconductor layer; and  
 source and drain electrodes on the ohmic contact layer.  
 
     
     
       8. A liquid crystal display (LCD) comprising:
 a first substrate and a second substrate;  
 gate lines and common lines formed on the first substrate;  
 data lines formed perpendicular to gate lines to define a plurality of pixel regions;  
 a thin film transistor formed for every one pixel;  
 a common electrode and a data electrode in parallel, for generating an in-plane field between the common electrode and the data electrode;  
 a gate pad, a data pad, and a common electrode pad electrically connected to each of the gate lines, data lines, and common lines, respectively;  
 a data on/off pad between adjacent data pads in substantially the same pattern as the data pad;  
 a gate on/off pad between adjacent gate pads in substantially the same pattern as the gate pad; and,  
 a common electrode on/off pad between adjacent common electrode pads for testing a common electrode signal applied to the pixel region.  
 
     
     
       9. An LCD as claimed in  claim 8 , wherein a pitch between the data pad and the data on/off pad is substantially identical to the pitch between the data pads. 
     
     
       10. An LCD as claimed in  claim 8 , wherein the gate on/off pad has a pattern substantially identical to the pattern of the gate pad. 
     
     
       11. An LCD as claimed in  claim 10 , wherein a pitch between the gate pad and the gate on/off pad is substantially identical to the pitch between the gate pads. 
     
     
       12. An LCD as claimed in  claim 8 , wherein the common electrode on/off pad has a pattern substantially identical to the pattern of the common electrode pad. 
     
     
       13. An LCD as claimed in  claim 12 , wherein a pitch between the common electrode pad and the common electrode on/off pad is substantially identical to the pitch between the common electrode pads. 
     
     
       14. An LCD as claimed in  claim 8 , wherein each of the gate on/off pad, the data on/off pad, and the common electrode on/off pad include a transparent conductive material. 
     
     
       15. An LCD as claimed in  claim 14 , wherein the transparent conductive material includes indium tin oxide. 
     
     
       16. An LCD as claimed in  claim 8 , wherein the thin film transistor includes;
 a gate electrode connected with a gate line;  
 a gate insulating film on an entire surface of the substrate including the gate electrode;  
 a semiconductor layer on the gate insulating film;  
 an ohmic contact layer on the semiconductor layer; and  
 source and drain electrodes on the ohmic contact layer.  
 
     
     
       17. A liquid crystal device (LCD) comprising:
 an upper substrate having a pixel region defined thereon;  
 a lower substrate bonded with the upper substrate by a sealing material and having a plurality of pads provided at edges of the lower substrate, the plurality of pads including data pads, gate pads, testing data on/off pads and testing gate on off/pads;  
 wherein at least one of the testing data on/off pads and the testing gate on/off pads has substantially the same pattern as the data pads and the gate pads, respectively;  
 wherein at least one testing data on/off ad is between adjacent data on/off pads;  
 wherein at least one testing gate on/off pad is between adjacent sate on/off pads; and  
 a liquid crystal provided between the substrates.  
 
     
     
       18. An LCD as claimed in  claim 17 , wherein a pitch between the data pad and the data on/off pad is substantially identical to the pitch between the data pads. 
     
     
       19. An LCD as claimed in  claim 17 , wherein the gate on/off pad has a pattern substantially identical to the pattern of the gate pad. 
     
     
       20. An LCD as claimed in  claim 17 , wherein a pitch between the gate pad and the gate on/off pad is substantially identical to the pitch between the gate pads. 
     
     
       21. An LCD as claimed in  claim 17 , wherein each of the gate on/off pad and the data on/off pad include a transparent conductive material. 
     
     
       22. An LCD as claimed in  claim 21 , wherein the transparent conductive material includes indium tin oxide. 
     
     
       23. An LCD as claimed in  claim 17 , wherein all of the common electrode, data and gate pads and the on/off pads are connected at an outer circumference of the LCD in an L line for applying a signal to the pixel region at substantially the same time. 
     
     
       24. An LCD as claimed in  claim 17 , wherein a data line is connected to an even numbered pad and an even numbered on/off pad. 
     
     
       25. An LCD as claimed in  claim 17 , wherein a data line is connected to an odd numbered pad and an odd numbered on/off pad. 
     
     
       26. An LCD as claimed in  claim 17 , further comprising an orientation film provided on the lower substrate. 
     
     
       27. A method of manufacturing a liquid crystal device (LCD) comprising:
 forming a gate line made of metal on a transparent substrate;  
 forming a gate electrode at the same time as the gate line;  
 forming a gate insulating film on the gate line;  
 forming a protection film on the gate insulating film;  
 etching the gate insulating film and the protection film to form first open parts;  
 forming gate pads made of a transparent conductive material to connect with the gate line through the first open parts;  
 forming a pixel electrode at the same time as the gate pads;  
 forming a data line on the gate insulating film;  
 forming source and drain electrodes at the same time as the data line;  
 etching the protection film to form second open parts;  
 forming data pads made of transparent conductive material to connect with the data line through the second open parts; and  
 forming gate on/off pads and data on/off pads having substantially the same pattern as the gate pads and provided between gate pads.  
 
     
     
       28. The method as in  claim 27 , wherein the data line and source and drain electrodes are formed after a semiconductor layer and an ohmic contact layer are formed. 
     
     
       29. The method as in  claim 27 , wherein the orientation film is rubbed with a rubbing cloth to form grooves in the film.