RF amplifier employing active load linearization

Abstract

A method and apparatus for linear amplification of a modulated carrier signal or multi-carrier signal is disclosed. The linearity of the amplifier is improved by employing dynamic load line adjustments. A second current source coupled to the amplifier output load is turned on just before the amplifier reaches a nonlinear regime and reduces the effective load to prevent the amplifier allowing sufficient power to reach the nonlinear regime near saturation. The technique is particularly advantageous for amplification of a signal with large peak to average ratio.

1. A power amplifier adapted for amplifying an RF input signal, comprising:
 an input for receiving an RF input signal; 
 an amplifier device coupled to the input and receiving the input signal and providing an amplified output signal; 
 a dynamically varying output load coupled to the amplifier device, including a variable impedance device coupled to the amplifier device so as to vary the impedance across the amplifier device as a function of an input signal, wherein the impedance across a amplifier device is substantially constant through a first portion of the input signal power range corresponding to the lower major portion of the input signal power range and drops substantially for a second portion of the input signal power range having higher power than said first portion of the input signal power range, the variable impedance device having approximately zero impedance through said first portion of the input signal power range and a substantially greater impedance through said second portion of the input signal power range; and 
 an output coupled to the output load for outputting the amplified output signal, 
 wherein said second portion of the input signal power range comprises the input signal power range greater than about 6–10 dB below the amplifier device saturation region and wherein the impedance across the amplifier device in said second portion of the input signal power range is about 50% of the impedance across the amplifier device in said first portion of the input signal power range. 
 
     
     
       2. A power amplifier adapted for amplifying an RF input signal, comprising:
 an input for receiving an RF input signal; 
 an amplifier device coupled to the input and receiving the input signal and providing an amplified output signal; 
 a dynamically varying output load coupled to the amplifier device, including a variable impedance device coupled to the amplifier device so as to vary the impedance across the amplifier device as a function of the input signal, wherein the impedance across the amplifier device is substantially constant through a first portion of an input signal power range corresponding to a lower major portion of the input signal power range and drops substantially for a second portion of the input signal power range having higher power than said first portion of the input signal power range, the variable impedance device having approximately zero impedance through said first portion of the input signal power range and a substantially greater impedance through said second portion of the input signal power range; and 
 an output coupled to the output load for outputting the amplified output signal, 
 wherein said variable impedance device presents negligible load to the amplifier device in said first portion of the input signal power range. 
 
     
     
       3. A power amplifier adapted for amplifying an RF input signal, comprising:
 an input for receiving an RF input signal; 
 an amplifier device coupled to the input and receiving the input signal and providing an amplified output signal; 
 a dynamically varying output load coupled to the amplifier device, including a variable impedance device coupled to the amplifier device so as to vary the impedance across the amplifier device as a function of the input signal, wherein the impedance across the amplifier device is substantially constant through a first portion of an input signal power range corresponding to a lower major portion of the input signal power range and drops substantially for a second portion of the input signal power range having higher power than said first portion of the input signal power range, the variable impedance device having approximately zero impedance through said first portion of the input signal power range and a substantially greater impedance through said second portion of the input signal power range; and 
 an output coupled to the output load for outputting the amplified output signal, 
 wherein said variable impedance device has an impedance peak in a lower power region of said second portion of the input signal power range and a substantially constant impedance in a higher power region of said second portion of the input signal power range. 
 
     
     
       4. A power amplifier as set out in  claim 3 , wherein said substantially constant impedance of said variable impedance device is approximately equal to the impedance across said amplifier device in said higher power region of said second portion of the input signal power range. 
     
     
       5. A power amplifier adapted for amplifying an RF input signal, comprising:
 an input for receiving an RF input signal; 
 an amplifier device coupled to the input and receiving the input signal and providing an amplified output signal; 
 a dynamically varying output load coupled to the amplifier device, including a variable impedance device coupled to the amplifier device so as to vary the impedance across the amplifier device as a function of the input signal, wherein the impedance across the amplifier device is substantially constant through a first portion of an input signal power range corresponding to a lower major portion of the input signal power range and drops substantially for a second portion of an input signal power range having higher power than said first portion of the input signal power range, the variable impedance device having approximately zero impedance through said first portion of the input signal power range and a substantially greater impedance through said second portion of the input signal power range; and 
 an output coupled to the output load for outputting the amplified output signal, 
 wherein said dynamically varying output load further comprises a fixed load and wherein said variable impedance device is coupled in parallel with said amplifier device to said fixed load. 
 
     
     
       6. A power amplifier adapted for amplifying an RF input signal, comprising:
 an input for receiving an RF input signal; 
 an amplifier device coupled to the input and receiving the input signal and providing an amplified output signal; 
 a dynamically varying output load coupled to the amplifier device, including a variable impedance device coupled to the amplifier device so as to vary the impedance across the amplifier device as a function of the input signal, wherein the impedance across the amplifier device is substantially constant through a first portion of an input signal power range corresponding to a lower major portion of the input signal power range and drops substantially for a second higher power portion of the input signal power range having higher power than said first portion of the input signal power range, the variable impedance device having approximately zero impedance through said first portion of the input signal power range and a substantially greater impedance through said second higher power portion of the input signal power range; and 
 an output coupled to the output load for outputting the amplified output signal, 
 wherein said amplifier device comprises a field effect transistor biased in class A or class AB. 
 
     
     
       7. A power amplifier as set out in  claim 5 , wherein said dynamically varying output load further comprises transformer means for transforming the impedance of said fixed load by a factor of about 1.5–3. 
     
     
       8. A power amplifier as set out in  claim 5 , wherein said dynamically varying output load further comprises means for adjusting the relative phase of the signals applied to said fixed load from said variable impedance device and said amplifier device. 
     
     
       9. A power amplifier circuit, comprising:
 an input for receiving an input signal; 
 a coupler for receiving the input signal and splitting the input signal on two signal paths; 
 a first amplifier device coupled to the coupler on a first of the two signal paths and receiving the input signal and providing a first amplified signal, said first amplifier device having a first turn-on threshold; 
 a second amplifier device coupled to the coupler on a second of the two signal paths and receiving the input signal and providing a second amplified signal, said second amplifier device having a second turn-on threshold and an impedance near zero when said input signal is below said second turn-on threshold; 
 an output load coupled to said first and second amplifier devices; 
 a DC power supply; 
 a first bias circuit coupled to the first amplifier device and the DC power supply and providing a first bias to the first amplifier device setting the first turn-on threshold of said first amplifier device; 
 a second bias circuit coupled to the second amplifier device and the DC power supply and providing a second bias to the second amplifier device setting the second turn-on threshold of said second amplifier device at a substantially higher level than said first turn-on threshold, said second turn-on threshold corresponding to a peak power region of the input signal; and 
 an output coupled to the first and second amplifier devices via said output load and providing an amplified output signal, 
 wherein said second turn-on threshold of said second amplifier device is about 6–10 dB below device saturation of said first amplifier device. 
 
     
     
       10. A power amplifier circuit, comprising:
 an input for receiving an input signal; 
 a coupler for receiving the input signal and splitting the input signal on two signal paths; 
 a first amplifier device coupled to the coupler on a first of the two signal paths and receiving the input signal and providing a first amplified signal, said first amplifier device having a first turn-on threshold; 
 a second amplifier device coupled to the coupler on a second of the two signal paths and receiving the input signal and providing a second amplified signal, said second amplifier device having a second turn-on threshold and an impedance near zero when said input signal is below said second turn-on threshold; 
 an output load coupled to said first and second amplifier devices; 
 a DC power supply; 
 a first bias circuit coupled to the first amplifier device and the DC power supply and providing a first bias to the first amplifier device setting the first turn-on threshold of said first amplifier device; 
 a second bias circuit coupled to the second amplifier device and the DC power supply and providing a second bias to the second amplifier device setting the second turn-on threshold of said second amplifier device at a substantially higher level than said first turn-on threshold, said second turn-on threshold corresponding to a peak power region of the input signal; and 
 an output coupled to the first and second amplifier devices via said output load and providing an amplified output signal, 
 wherein said second amplifier device has a transitional region after the turn-on threshold and a fully turned on region at higher power and a real component of the impedance across said first and second amplifier devices are substantially equal when said second amplifier device is in the fully turned on region. 
 
     
     
       11. A power amplifier circuit as set out in  claim 10 , wherein said first and second amplifier devices are field effect transistors and have respective source and gate terminals, and are coupled to receive said input signal applied to their respective gate terminals and wherein said first and second bias circuits are coupled to the respective gate terminals of said first and second amplifier devices. 
     
     
       12. A power amplifier circuit as set out in  claim 11 , wherein said first and second bias circuits provide first and second fixed voltage bias levels to the respective gate terminals of said first and second amplifier devices to set the respective turn-on thresholds of said first and second amplifier devices. 
     
     
       13. A power amplifier circuit as set out in  claim 12 , wherein said first and second bias circuits comprise first and second resistor networks coupled to said DC supply and the respective gate terminals of said first and second amplifier devices. 
     
     
       14. A power amplifier circuit as set out in  claim 13 , wherein said first and second resistor networks comprise one or more common resistors. 
     
     
       15. A power amplifier circuit as set out in  claim 13 , wherein said first and second bias circuits further comprise first and second low pass matching circuits coupled between said DC supply and the respective gate terminals of said first and second amplifier devices. 
     
     
       16. A power amplifier circuit, comprising:
 an input for receiving an input signal; 
 a coupler for receiving the input signal and splitting the input signal on two signal paths; 
 a first amplifier device coupled to the coupler on a first of the two signal paths and receiving the input signal and providing a first amplified signal, said first amplifier device having a first turn-on threshold; 
 a second amplifier device coupled to the coupler on a second of the two signal paths and receiving the input signal and providing a second amplified signal, said second amplifier device having a second turn-on threshold and an impedance near zero when said input signal is below said second turn-on threshold; 
 an output load coupled to said first and second amplifier devices; 
 a DC power supply; 
 a first bias circuit coupled to the first amplifier device and the DC power supply and providing a first bias to the first amplifier device setting the first turn-on threshold of said first amplifier device; 
 a second bias circuit coupled to the second amplifier device and the DC power supply and providing a second bias to the second amplifier device setting the second turn-on threshold of said second amplifier device at a substantially higher level than said first turn-on threshold, said second turn-on threshold corresponding to a peak power region of the input signal; 
 an output coupled to the first and second amplifier devices via said output load and providing an amplified output signal; and 
 a 90 degree phase inverting circuit coupled between said output load and said first or second amplifier device. 
 
     
     
       17. A power amplifier circuit as set out in  claim 16 , wherein said phase inverting circuit is a K inverter circuit. 
     
     
       18. A power amplifier circuit as set out in  claim 16 , wherein said coupler comprises a 90 degree hybrid coupler and wherein said phase inverting circuit adjusts the relative phase of the first and second amplified signals from said first and second amplifiers to compensate for the effect of the 90 degree hybrid coupler and relative phase shifts introduced by the amplifier devices and bias circuits. 
     
     
       19. A power amplifier circuit, comprising:
 an input for receiving an input signal; 
 a coupler for receiving the input signal and splitting the input signal on two signal paths; 
 a first amplifier device coupled to the coupler on a first of the two signal paths and receiving the input signal and providing a first amplified signal, said first amplifier device having a first turn-on threshold; 
 a second amplifier device coupled to the coupler on a second of the two signal paths and receiving the input signal and providing a second amplified signal, said second amplifier device having a second turn-on threshold and an impedance near zero when said input signal is below said second turn-on threshold; 
 an output load coupled to said first and second amplifier devices; 
 a DC power supply; 
 a first bias circuit coupled to the first amplifier device and the DC power supply and providing a first bias to the first amplifier device setting the first turn-on threshold of said first amplifier device; 
 a second bias circuit coupled to the second amplifier device and the DC power supply and providing a second bias to the second amplifier device setting the second turn-on threshold of said second amplifier device at a substantially higher level than said first turn-on threshold, said second turn-on threshold corresponding to a peak power region of the input signal; 
 an output coupled to the first and second amplifier devices via said output load and providing an amplified output signal; and 
 a transformer coupled to said first and second amplifier devices in parallel with said output load. 
 
     
     
       20. A method for linear and efficient amplification of an RF input signal , comprising:
 receiving an RF input signal having an input signal power range; 
 sampling the input signal to provide a sampled input signal; 
 amplifying the input signal with a first amplifier device and applying the amplified input signal across a load to provide an output signal; 
 amplifying the sampled input signal with a second amplifier device and applying the amplified sampled input signal to the output load in parallel with said amplified input signal; and 
 dynamically varying the impedance of said second amplifier device from a first impedance having a substantially constant near zero value over a lower major portion of the input signal power range to a second impedance having a higher value than said first impedance in a peak power region of the input signal to substantially reduce the load of the first amplifier device when the input signal approaches the peak power region while maintaining the load substantially constant over the lower major portion of the input signal power range, 
 wherein dynamically varying the impedance of said second amplifier device to substantially reduce the load of the first amplifier device comprises reducing said load in the peak power region by at least about 50% from the load below the peak power region. 
 
     
     
       21. A method for linear and efficient amplification of an RF input signal as set out in  claim 20 , wherein the first amplifying device has a saturation power level and wherein said peak power region comprises the input signal power range greater than about 6–10 dB below the saturation power level. 
     
     
       22. A method for linear and efficient amplification of an RF input signal, comprising:
 receiving an RF input signal having an input signal power range; 
 sampling the input signal to provide a sampled input signal; 
 amplifying the input signal with a first amplifier device and applying the amplified input signal across a load to provide an output signal; 
 amplifying the sampled input signal with a second amplifier device and applying the amplified sampled input signal to the output load in parallel with said amplified input signal; and 
 dynamically varying the impedance of said second amplifier device from a first impedance having a substantially constant near zero value over a lower major portion of the input signal power range to a second impedance having a higher value than said first impedance in a peak power region of the input signal to substantially reduce the load of the first amplifier device when the input signal approaches the peak power region while maintaining the load substantially constant over the lower major portion of the input signal power range, 
 wherein said second higher impedance of the second amplifier device varies from a peak impedance value at a lower power level of the input signal to a second substantially constant impedance value at a higher power level of the input signal. 
 
     
     
       23. A method for linear and efficient amplification of an RF input signal, comprising:
 receiving an RF input signal having an input signal power range; 
 sampling the input signal to provide a sampled input signal; 
 amplifying the input signal with a first amplifier device and applying the amplified input signal across a load to provide an output signal; 
 amplifying the sampled input signal with a second amplifier device and applying the amplified sampled input signal to the output load in parallel with said amplified input signal; and 
 dynamically varying the impedance of said second amplifier device from a first impedance having a substantially constant near zero value over a lower major portion of the input signal power range to a second impedance having a higher value than said first impedance in a peak power region of the input signal to substantially reduce the load of the first amplifier device when the input signal approaches the peak power region while maintaining the load substantially constant over the lower major portion of the input signal power range, 
 wherein said second amplifier device has a positive real impedance in at least a portion of said peak power region of the input signal. 
 
     
     
       24. A method for linear and efficient amplification of an RF input signal, comprising:
 receiving an RF input signal having an input signal power range; 
 sampling the input signal to provide a sampled input signal; 
 amplifying the input signal with a first amplifier device and applying the amplified input signal across a load to provide an output signal; 
 amplifying the sampled input signal with a second amplifier device and applying the amplified sampled input signal to the output load in parallel with said amplified input signal; 
 dynamically varying the impedance of said second amplifier device from a first impedance having a substantially constant near zero value over a lower major portion of the input signal power range to a second impedance having a higher value than said first impedance in a peak power region of the input signal to substantially reduce the load of the first amplifier device when the input signal approaches the peak power region while maintaining the load substantially constant over the lower major portion of the input signal power range; and 
 adjusting the relative phase of the amplified input signal and the amplified input sampled signal so as to be in phase at the output load. 
 
     
     
       25. A method for linear and efficient amplification of an RF input signal as set out in  claim 24 , wherein sampling the input signal comprises providing a 90 degree phase shifted sample of the input signal and wherein said adjusting the relative phase of the amplified signal and the amplified sampled input signal compensates for said 90 degree phase shifting. 
     
     
       26. A method for linear and efficient amplification of an RF input signal as set out in  claim 24 , wherein adjusting the relative phase of the amplified signal and the amplified sampled input signal comprises passing the amplified sampled input signal through a K inverter circuit.