Current output stages

Abstract

Current output stages are provided. In accordance with an embodiment, a current output stage includes a voltage follower circuit, a first current mirror and a second current mirror. A node of the voltage follower circuit provides a voltage that follows a voltage at the output of the current output stage. An input of the first current mirror is connected (e.g., by a current path of a transistor) to the node of the voltage follower circuit that follows the voltage at the output of the current output stage. An output of the first current mirror is connected to an input of the second current mirror. An output of the second current mirror is connected to the input of the current output stage.

1. A current output stage having an input and an output, the current output stage composing:
 a first transistor including a gate connected to the input of the current output stage, a drain connected to the output of the current output stage, and a source; 
 a second transistor including a gate connected to the input of the current output stage, a source connected to the source of the first transistor, and a drain; 
 a third transistor including a source connected to the drain of the second transistor, a gate, and a drain; 
 a first current mirror including an input connected to the drain of the third transistor, and an output; and 
 a second current mirror including an input connected to the output of the first current mirror, and an output connected to the input of the current output stage; 
 wherein the third transistor is part of a voltage follower circuit that causes a voltage at the source of the third transistor to follow a voltage at the output of the current output stage. 
 
     
     
       2. The current output stage of  claim 1 , wherein a signal provided at the input of the current output stage is substantially cancelled by a feedback signal at the output of the second current mirror, thereby limiting swings at the input of the current output stage to relatively small swings, while allowing relatively larger swings at the output of the current output stage. 
     
     
       3. The current output stage of  claim 1 , wherein the voltage follower circuit further comprises a feedback amplifier including a non-inverting input connected to the output of the current output stage, an inverting input connected to the source of the third transistor, and an output connected to the gate of the third transistor. 
     
     
       4. The current output stage of  claim 1 , wherein the voltage follower circuit further comprises:
 a fourth transistor including a gate connected to the input of the current output stage, a drain connected to the output of the current output stage, and a source connected to the source of the first transistor and the source of the second transistor; 
 a fifth transistor including a gate and a drain connected together and to the gate of the third transistor, and a source connected to the output of the current output stage; and 
 a sixth transistor connected in a common source configuration and a common gate configuration with transistors of the first current mirror, and including a drain connected to the drain of the fifth transistor. 
 
     
     
       5. The current output stage of  claim 4 , wherein the source of the first transistor, the source of the second transistor and the source of the fourth transistor are all connected to a first supply rail voltage. 
     
     
       6. The current output stage of  claim 5 , wherein the first current mirror includes:
 a seventh transistor including a gate and a drain connected together and forming the input of the first current mirror, and a source connected to a second supply rail voltage; and 
 an eighth transistor including a gate connected to the gate of the seventh transistor, a source connected to the second supply rail voltage, and a drain forming the output of the first current mirror. 
 
     
     
       7. The current output stage of  claim 6 , wherein the second current mirror includes:
 a ninth transistor including a gate and a drain connected together and forming the input of the second current mirror, and a source connected to the first supply rail voltage; and 
 a tenth transistor including a gate connected to the gate of the ninth transistor, a source connected to the first supply rail voltage, and a drain forming the output of the second current mirror. 
 
     
     
       8. The current output stage of  claim 7 , wherein each of the first, second, third, fourth, fifth, ninth and tenth transistors comprises an NMOS transistor; and each of the sixth, seventh and eighth transistors comprises a PMOS transistor. 
     
     
       9. The current output stage of  claim 7 , wherein each of the first, second, third, fourth, fifth, ninth and tenth transistors comprises a PMOS transistor; and each of the sixth, seventh and eighth transistors comprises an NMOS transistor. 
     
     
       10. The current output stage of  claim 1 , wherein:
 the input of the current output stage accepts a single ended current input; and 
 the output of the current output stage provides a single ended current output. 
 
     
     
       11. The current output stage of  claim 1 , wherein:
 the input of the current output stage is connected to a differential input stage adapted to receive a differential voltage input. 
 
     
     
       12. The current output stage of  claim 1 , wherein the voltage follower circuit further comprises:
 a fourth transistor including a gate and a drain connected together and to the gate of the third transistor, and a source connected to the output of the current output stage; and 
 a fifth transistor connected in a common source configuration and a common gate configuration with transistors of the first current mirror, and including a drain connected to the drain of the fourth transistor. 
 
     
     
       13. The current output stage of  claim 12 , wherein:
 each of the first, second, third and fourth transistors, and each transistor of the second current mirror, comprises an NMOS transistor; and 
 the fifth transistor, and each transistor of the first current mirror, comprises a PMOS transistor. 
 
     
     
       14. The current output stage of  claim 12 , wherein:
 each of the first, second, third and fourth transistors, and each transistor of the second current mirror, comprises a PMOS transistor; and 
 the fifth transistor, and each transistor of the first current mirror, comprises an NMOS transistor. 
 
     
     
       15. A current output stage having an input and an output, the current output stage comprising:
 a first transistor including a control terminal connected to the input of the current output stage, and a current path connected between the output of the current output stage and a first supply rail voltage; 
 a second transistor including a control terminal connected to the input of the current output stage, and a current path; 
 a third transistor including a control terminal and a current path; 
 a first current mirror including an input connected to the current path of the third transistor, and an output, wherein the first current mirror is connected to a second supply rail voltage; 
 a second current mirror including an input connected to the output of the first current mirror, and an output connected to the input of the current output stage, wherein the second current mirror is connected to the first supply rail voltage; 
 wherein the current path of the second transistor is connected between the current path of the third transistor and the first supply rail voltage; and 
 wherein the third transistor is part of a voltage follower circuit that causes a voltage, at a node between the current path of the third transistor and the current path of the second transistor, to follow a voltage at the output of the current feedbaek output stage. 
 
     
     
       16. The current output stage of  claim 15 , wherein a signal provided at the input of the current output stage is substantially cancelled by a feedback signal at the output of the second current mirror, thereby limiting swings at the input of the current output stage to relatively small swings, while allowing relatively larger swings at the output of the current output stage. 
     
     
       17. The current output stage of  claim 15 , wherein each of the first, second and third transistors comprises a MOSFET transistor. 
     
     
       18. The current output stage of  claim 17 , wherein each control terminal comprises a gate terminal, and each current path comprises a drain-source path. 
     
     
       19. The current output stage of  claim 15 , wherein each of the first, second and third transistors comprises a BJT transistor. 
     
     
       20. The current output stage of  claim 19 , wherein each control terminal comprises a base terminal, and each current path comprises a collector-emitter path. 
     
     
       21. The current output stage of  claim 15 , wherein the voltage follower circuit further comprises a feedback amplifier including a non-inverting input connected to the output of the current output stage, an inverting input connected to the node between the current path of the third transistor and the current path of the second transistor, and an output connected to the control terminal of the third transistor. 
     
     
       22. The current output stage of  claim 15 , wherein the voltage follower circuit further comprises:
 a fourth transistor including a control terminal connected to the input of the current output stage, and a current path connected between the output of the current output stage and the first supply rail voltage; 
 a fifth transistor including a control terminal, and current path including a first terminal and a second terminal, the first terminal connected to the control terminal, the second terminal connected to the output of the current output stage; and 
 a sixth transistor including a control terminal and a current path, the control terminal connected to control terminals of transistors of the first current mirror, the current path connected between the second supply rail voltage and the first terminal of the current path of the fifth transistor. 
 
     
     
       23. The current output stage of  claim 22 , wherein:
 each of the first, second, third, fourth and fifth transistors, and each transistor of the second current mirror, comprises an N-channel transistor; and 
 the sixth transistor, and each transistor of the first current mirror, comprises a P-channel transistor. 
 
     
     
       24. The current output stage of  claim 22 , wherein:
 each of the first, second, third, fourth and fifth transistors, and each transistor of the second current mirror, comprises a P-channel transistor; and 
 the sixth transistor, and each transistor of the first current mirror, comprises an N-channel transistor. 
 
     
     
       25. The current output stage of  claim 15 , wherein:
 the input of the current output stage accepts a single ended current input; and 
 the output of the current output stage provides a single ended current output. 
 
     
     
       26. The current output stage of  claim 15 , wherein:
 the input of the current output stage is connected to a differential input stage adapted to receive a differential voltage input. 
 
     
     
       27. The current output stage of  claim 15 , wherein the voltage follower circuit further comprises:
 a fourth transistor including a control terminal, and current path including a first terminal and a second terminal, the first terminal connected to the control terminal, the second terminal connected to the output of the current output stage; and 
 a fifth transistor including a control terminal and a current path, the control terminal connected to control terminals of transistors of the first current mirror, the current path connected between the second supply rail voltage and the first terminal of the current path of the fourth transistor. 
 
     
     
       28. The current output stage of  claim 27 , wherein:
 each of the first, second, third and fourth transistors, and each transistor of the second current mirror, comprises an N-channel transistor; and 
 the fifth transistor, and each transistor of the first current mirror, comprises a P-channel transistor. 
 
     
     
       29. The current output stage of  claim 27 , wherein:
 each of the first, second, third and fourth transistors, and each transistor of the second current mirror, comprises a P-channel transistor; and 
 the fifth transistor, and each transistor of the first current mirror, comprises an N-channel transistor. 
 
     
     
       30. A current output stage having an input and an output, the current output stage comprising:
 a voltage follower circuit that includes a feedback amplifier and a transistor a 
 a first current mirror including an input and an output; and 
 a second current mirror including an input connected to the output of the first current mirror, and an output connected to the input of the current output stage; 
 wherein the feedback amplifier includes first and second inputs and an output, the first input being connected to the output of the current output stage; and 
 wherein the transistor includes a control terminal and a current path, the control terminal connected to the output of the feedback amplifier, and the current path connecting the second input of the feedback amplifier to the input of the first current mirror. 
 
     
     
       31. A current output stage having an input and an output, the current output stage comprising:
 a voltage follower circuit that includes a node having a voltage that follows a voltage at the output of the current output stage; 
 a first current mirror including an input connected to the node of the voltage follower circuit that follows the voltage at the output node of the current output stage, and an output; and 
 a second current mirror including an input connected to the output of the first current mirror, and an output connected to the input of the current output stage; 
 wherein a signal provided at the input of the current output stage is substantially cancelled by a feedback signal at the output of the second current mirror, thereby limiting swings at the input of the current output stage to relatively small swings, while allowing relatively larger swings at the output of the current output stage. 
 
     
     
       32. The current output stage of  claim 31 , wherein a current path of a transistor connects the node of the voltage follower circuit to the input of the first current mirror. 
     
     
       33. A current output stage having an input and an output, the current output stage comprising:
 a transistor including a control terminal and a current path, the current path including a first terminal and a second terminal, the control terminal being connected to the input of the current output stage, and the first terminal connected to the output of the current output stage; 
 a voltage follower circuit that includes a node having a voltage that follows a voltage at the output of the current output stage; 
 a first current mirror including an input and an output, the input connected to the node of the voltage follower circuit that follows the voltage at the output of the current output stage; and 
 a second current mirror including an input and an output, the input connected to the output of the first current mirror, and the output connected to the input of the current output stage. 
 
     
     
       34. The current output stage of  claim 33 , wherein a signal provided at the input of the current output stage is substantially cancelled by a feedback signal at the output of the second current mirror, thereby limiting swings at the input of the current output stage to relatively small swings, while allowing relatively larger swings at the output of the current output stage. 
     
     
       35. The current output stage of  claim 33 , wherein a current path of a further transistor connects the node of the voltage follower circuit to the input of the first current mirror. 
     
     
       36. A method for providing a current output stage with high-impedance, high-speed, high-accuracy and high-output swing, comprising:
 accepting an input signal at an input node; 
 providing an output signal, based on the input signal, at an output node; 
 producing a feedback signal indicative of a voltage at the output node; and 
 using the feedback signal to substantially cancel the input signal at the input node, to thereby limit swings at the input node, while allowing relatively larger swings in the output signal at the output node.