Apparatus and method for detecting a phase difference

Abstract

A method for detecting a phase difference between a first input signal and a second input signal is provided. The method contains: detecting the phase difference of the first and the second input signals to produce an output signal; generating a first voltage according to a first level of the output signal; generating a second voltage according to a second level of the output signal; and comparing the first voltage and the second voltage to produce the information regarding the phase difference between the first and the second input signals.

1. A method for detecting a phase difference between a first input signal and a second input signal, comprising:
 receiving the first and the second input signals and outputting a phase difference signal of the first and the second input signals; 
 generating a first voltage according to a first level of the phase difference signal and generating a second voltage according to a second level of the phase difference signal; and 
 comparing the first voltage and the second voltage after a predetermined number of cycles to produce a comparison value that represents the phase difference between the first and the second input signals. 
 
   
   
     2. The method of  claim 1 , further comprising:
 performing an XOR operation on the first and the second input signals to thereby output the phase difference signal. 
 
   
   
     3. The method of  claim 1 , further comprising:
 accumulating the first voltage and accumulating the second voltage for the predetermined number of cycles before comparing the first voltage and the second voltage. 
 
   
   
     4. The method of  claim 1 , wherein generating the first and second voltages further comprises:
 in a first period, generating the first voltage and the second voltage according to the first and the second levels of the phase difference signal, respectively; and 
 in a second period, generating the first voltage and the second voltage according to the second and the first levels of the phase difference signal, respectively. 
 
   
   
     5. The method of  claim 1 , wherein generating the first and second voltages further comprises:
 providing first and second currents according to the first and the second levels of the phase difference signal, respectively; and 
 generating the first and the second voltages according to the first and the second currents. 
 
   
   
     6. The method of  claim 5 , wherein generating the first and second voltages further comprises:
 providing the first and the second currents according to the second and the first levels of the phase difference signal, respectively. 
 
   
   
     7. The method of  claim 1 , wherein a duration of the predetermined number of cycles is greater than a predetermined time duration. 
   
   
     8. The method of  claim 1 , further comprising:
 generating the first voltage according to the first level of the phase difference signal for a first portion of the predetermined number of cycles, and according to the second level of the phase difference signal for a remaining portion of the predetermined number of cycles; and 
 generating the second voltage according to the second level of the phase difference signal for the first portion of the predetermined number of cycles, and according to the first level of the phase difference signal for a remaining portion of the predetermined number of cycles. 
 
   
   
     9. An apparatus for detecting a phase difference between a first input signal and a second input signal, comprising:
 a detecting circuit utilized for receiving the first and the second input signals to output a phase difference signal of the first and the second input signals; 
 a charge pump module utilized for respectively generating a first voltage according to a first level of the phase difference signal and generating a second voltage according to a second level of the phase difference signal; and 
 a comparing circuit utilized for comparing the first voltage and the second voltage after a predetermined number of cycles to produce a comparison signal that represents the phase difference between the first and the second input signals. 
 
   
   
     10. The apparatus of  claim 9 , wherein the detecting circuit is an XOR gate. 
   
   
     11. The apparatus of  claim 9 , wherein the charge pump module is further for accumulating the first voltage and accumulating the second voltage for the predetermined number of cycles before the comparing circuit compares the first voltage and the second voltage. 
   
   
     12. The apparatus of  claim 9 , wherein the charge pump module comprises a first charge pump for generating the first voltage and a second charge pump for generating the second voltage. 
   
   
     13. The apparatus of  claim 12 , wherein the first charge pump comprises:
 a first current source utilized for providing a first current; 
 a first capacitor charged by receiving the first current and utilized for generating the first voltage and accumulating the first voltage for the predetermined number of cycles; and 
 a first switch, coupled between the first current source and the first capacitor, for controlling the charging of the first capacitor according to the first level of the phase difference signal. 
 
   
   
     14. The apparatus of  claim 9 , wherein the charge pump module comprises:
 a first current source utilized for providing a first current; 
 a first capacitor charged by receiving the first current, utilized for generating the first voltage and accumulating the first voltage for the predetermined number of cycles; 
 a first switch, coupled between the first current source and the first capacitor, for controlling the charging of the first capacitor according to the first level of the phase difference signal; 
 a second capacitor charged by receiving the first current, utilized for generating the second voltage and accumulating the second voltage for the predetermined number of cycles; and 
 a second switch, coupled between the first current source and the second capacitor, for controlling the charging of the second capacitor according to the second level of the phase difference signal. 
 
   
   
     15. The apparatus of  claim 14 , further comprising:
 a switch circuit, coupled between the detecting circuit and the charge pump module, for in a first period, coupling the phase difference signal to the first switch and coupling an inverted version of the phase difference signal to the second switch; and 
 in a second period, coupling the inverted version of the phase difference signal to the first switch and coupling the phase difference signal to the second switch. 
 
   
   
     16. The apparatus of  claim 9 , wherein the comparing circuit is a one-bit comparator, the comparison signal output by the one-bit comparator having a one-bit value representing whether the first input signal leads or lags the second input signal. 
   
   
     17. The apparatus of  claim 9 , wherein the comparing circuit includes an analog to digital converter (ADC) for outputting a digital comparison signal representing the phase difference between the first input signal and the second input signal. 
   
   
     18. The apparatus of  claim 9 , wherein a duration of the predetermined number of cycles is greater than a predetermined time duration. 
   
   
     19. The apparatus of  claim 9 , wherein the charge pump module is further for generating the first voltage according to the first level of the phase difference signal for a first portion of the predetermined number of cycles, and according to the second level of the phase difference signal for a remaining portion of the predetermined number of cycles; and for generating the second voltage according to the second level of the phase difference signal for the first portion of the predetermined number of cycles, and according to the first level of the phase difference signal for a remaining portion of the predetermined number of cycles. 
   
   
     20. The apparatus of  claim 12 , wherein the first charge pump and the second charge pump are substantially the same.