Non-contact method and apparatus for on-line interconnect characterization in VLSI circuits

Abstract

A system that facilitates non-invasive in-line characterization of parameters of VLSI circuit interconnects is provided. A plurality of micro-electro-mechanical system (MEMS) cantilevers apply voltage(s) to VLSI circuit interconnect(s) without physical contact thereto. A measuring component measures deflection characteristics of the cantilevers, the deflection(s) correspond to electrical forces generated from the applied voltage(s) as passed through VLSI circuit interconnect(s). A component computes characteristics of the VLSI interconnect based at least in part upon the measured deflection characteristics.

1. A system that facilitates non-invasive in-line characterization of parameters of VLSI circuit interconnects, comprising:
 a plurality of micro-electro-mechanical system (MEMS) cantilevers that apply voltage(s) to VLSI circuit interconnect(s) without physical contact thereto; 
 a measuring component that measures deflection characteristics of the cantilevers, the deflection(s) correspond to electrical forces generated from the applied voltage(s) as passed through VLSI circuit interconnect(s); and 
 a component that computes characteristics of the VLSI interconnect based at least in part upon the measured deflection characteristics. 
 
   
   
     2. The system of  claim 1 , further comprising a control component that effectuates control of a VLSI circuit fabrication process step based at least in part upon the computed characteristics. 
   
   
     3. The system of  claim 2 , the computed characteristics are employed as feedback information to the control component. 
   
   
     4. The system of  claim 2 , wherein the computed characteristics are employed as feed-forward information to the control component. 
   
   
     5. The system of  claim 1 , the MEMS cantilevers comprise conductive tips to effectuate injection of voltages into the VLSI circuit interconnects. 
   
   
     6. The system of  claim 5 , the MEMS cantilevers act as a conductive path to the conductive tips. 
   
   
     7. The system of  claim 5 , a conductive path is provided on the MEMS cantilevers to the conductive tips to facilitate injection of currents into the VLSI circuit interconnects. 
   
   
     8. The system of  claim 1 , further comprising test structures for capacitance and/or resistance measurement. 
   
   
     9. The system of  claim 1 , further comprising a voltage source that delivers voltages to the MEMS cantilevers, the voltage source delivering disparate voltages to disparate MEMS cantilevers. 
   
   
     10. The system of  claim 1 , the measuring component comprising a photo-detector that detects a laser beam deflecting off at least one MEMS cantilever. 
   
   
     11. The system of  claim 1 , the measuring component comprises an optical interferometer. 
   
   
     12. The system of  claim 1 , further comprising a positioning component that facilitates proper positioning of the MEMS cantilevers with respect to the VLSI circuit interconnects. 
   
   
     13. The system of  claim 12 , the position components being scanners. 
   
   
     14. The system of  claim 1 , further comprising a pre-amplifier. 
   
   
     15. The system of  claim 1 , further comprising an amplifier. 
   
   
     16. The system of  claim 1 , further comprising a tuning fork, at least one MEMS cantilever is attached to the tuning fork. 
   
   
     17. The system of  claim 16 , the tuning fork is a quartz tuning fork that can be at least one of self-sensing and self-actuating. 
   
   
     18. The system of  claim 16 , an electrostatic shield is provided to shield a conductive path across the tuning fork to a conductive tip of the MEMS cantilever. 
   
   
     19. The system of  claim 16 , a first leg of the MEMS cantilever is attached to a first prong of the tuning fork, and a second leg of the MEMS cantilever is attached to a second prong of the tuning fork. 
   
   
     20. The system of  claim 1 , at least one MEMS cantilever is a piezo-resistive cantilever. 
   
   
     21. The system of  claim 1 , employed to measure coupling capacitance between VLSI circuit interconnects. 
   
   
     22. The system of  claim 1 , employed to measure capacitance between at least one VLSI circuit interconnect and a ground plane. 
   
   
     23. The system of  claim 1 , the MEMS cantilevers and the VLSI circuit interconnects are within a vacuum chamber. 
   
   
     24. The system of  claim 1 , utilized to characterize at least one of resistance and capacitance of a transistor. 
   
   
     25. The system of  claim 1 , a distance between VLSI circuit interconnects is less than 0.2 μm. 
   
   
     26. The system of  claim 1 , a length of VLSI circuit interconnects is less than 10 μm. 
   
   
     27. The system of  claim 1 , at least a portion of a first VLSI circuit interconnect to be tested is on a disparate layer compared to a second VLSI circuit interconnect to be tested. 
   
   
     28. The system of  claim 1 , the VLSI circuit interconnects are covered by a layer of dielectric. 
   
   
     29. A system that facilitates characterization of VLSI circuit interconnects, comprising:
 a voltage source that outputs a plurality of disparate voltages; 
 two or more micro-electro-mechanical system (MEMS) cantilevers that receive the voltages output by the voltage source and apply the voltage(s) to VLSI circuit interconnect(s), wherein a first MEMS cantilever contacts a first VLSI interconnect and a second MEMS cantilever does not physically contact a VLSI interconnect; 
 a measuring component that measures deflection characteristics of the cantilevers, the deflection(s) correspond to electrical forces generated from the applied voltage(s) as passed through VLSI circuit interconnect(s); and 
 a component that computes characteristics of the VLSI interconnect based at least in part upon the measured deflection characteristics. 
 
   
   
     30. The system of  claim 29 , wherein the computing component calculates a coupling capacitance between VLSI circuit interconnects based at least in part upon the measured deflection characteristics. 
   
   
     31. The system of  claim 29 , the computing component calculates a capacitance of a VLSI circuit interconnect that is not contacted by the first MEMS cantilever with respect to ground. 
   
   
     32. A method that facilitates measurement of various parameters of VLSI circuit interconnects, comprising:
 positioning at least two MEMS cantilevers with conductive tips in proximity to at least two adjacent VLSI circuit interconnects; 
 providing voltage(s) to the conductive tips; 
 injecting the current (s) into the VLSI circuit interconnects via the conductive tips; 
 measuring oscillations resultant in the MEMS cantilevers; and 
 computing capacitance related to the VLSI circuit interconnects based at least in part upon the measured oscillations. 
 
   
   
     33. The method of  claim 32 , further comprising computing coupling capacitance between the two adjacent VLSI circuit interconnects based at least in part upon the measured oscillations. 
   
   
     34. The method of  claim 32 , further comprising computing capacitance of at least one MEMS cantilever with respect to a ground plane in a substrate. 
   
   
     35. The method of  claim 32 , further comprising:
 providing a first voltage to a first MEMS cantilever with a frequency substantially similar to one half of at least one of a natural resonant frequency and a user-selected frequency of the first MEMS cantilever; and 
 grounding a second MEMS cantilever. 
 
   
   
     36. The method of  claim 32 , further comprising:
 providing a first voltage to a first MEMS cantilever with a frequency substantially similar to one half of at least one of a natural resonant frequency and a user-selected frequency of a second MEMS cantilever; and 
 grounding the second MEMS cantilever. 
 
   
   
     37. The method of  claim 32 , further comprising:
 providing a first voltage to a first MEMS cantilever with a frequency substantially similar to bf res6 , where b is a constant such that b≧1.3 and resonance frequency (f res6 ) is substantially similar to one half of at least one of a resonant frequency and a user-selected frequency of a second MEMS cantilever; and 
 providing a second voltage to the second MEMS cantilever with a frequency substantially similar to f res6  (1+ab), where a resonance frequency(f res5 ) is substantially similar to half a resonant frequency of the first MEMS cantilever and a is substantially similar to f res5 /f res6 . 
 
   
   
     38. The method of  claim 32 , further comprising:
 providing a first voltage to a first MEMS cantilever with a frequency substantially similar to bf res6 , where b is a constant such that b≧1.3 and resonance frequency (f res6 ) is substantially similar to one half of at least one of a resonant frequency and a user-selected frequency of a second MEMS cantilever; and 
 providing a second voltage to the second MEMS cantilever with a frequency substantially similar to f res6 (1+ab), wherein where a is substantially similar to f res5 /f res6 , and f res5  is substantially similar to one half of at least one of a resonant frequency and a user-selected frequency of the first MEMS cantilever. 
 
   
   
     39. The method of  claim 32 , further comprising:
 providing a first voltage to a first MEMS cantilever with a frequency substantially similar to at least one of a resonant frequency and a user-selected frequency of the first MEMS cantilever; and 
 grounding a second MEMS cantilever. 
 
   
   
     40. The method of  claim 32 , further comprising:
 providing a first voltage to a first MEMS cantilever with a frequency substantially similar to at least one of a resonant frequency and a user-selected frequency of a second MEMS cantilever; and 
 grounding the second MEMS cantilever. 
 
   
   
     41. The method of  claim 32 , further comprising controlling a VLSI circuit fabrication process based at least in part upon measured oscillations. 
   
   
     42. The method of  claim 32  employed to characterize a transistor. 
   
   
     43. A system for characterizing of VLSI interconnect circuits, comprising:
 means for positioning two or more MEMS cantilevers proximate to a pair of VLSI circuit interconnects without contact thereto; 
 means for injecting currents into the VLSI circuit interconnects via the MEMS cantilevers; 
 means for measuring oscillations on the MEMS cantilevers resulting from electrostatic forces generated upon injecting the currents; and 
 means for computing capacitance related to the VLSI circuit interconnects based at least in part upon the measured oscillations. 
 
   
   
     44. The system of  claim 43 , further comprising means for selectively injecting disparate currents into the VLSI circuit interconnects. 
   
   
     45. The system of  claim 44 , further comprising means for calculating capacitance based at least in part upon measured oscillations resulting from application of a plurality of disparate voltages.