Voltage source circuit with selectable temperature independent and temperature dependent voltage outputs

Abstract

A voltage source includes first and second pn junctions which conduct the outputs of respective current sources to establish respective base-emitter voltages V be1 and V be2 at respective nodes; V be1 and V be2 can each be generated with a current I or a current N*I. An amplifier A 1 has its non-inverting input connected to the second node and its inverting input connected to the first node through an input capacitor; a feedback capacitor is connected between the inverting input and a third node. Switches are connected between A 1 's inverting input and A 1 's output, between the third node and A 1 's output, and between the third node and a circuit common point. A control circuit operates the switches and current sources during first and second operating phases to selectively produce a temperature independent output voltage or a temperature dependent output voltage.

1. A voltage source circuit capable of selectively providing temperature independent and temperature dependent output voltages, comprising:
 an output terminal which provides said voltage source's output voltage V out ; 
 a base-emitter voltage generating circuit, comprising:
 a first current source which provides a current i 1  which is selectively set to a value I or a value N*I; 
 a second current source which provides a current i 2  which is selectively set to a value I or a value N*I; 
 first and second pn junctions connected to conduct i 1  and i 2  and thereby establish first and second base-emitter voltages V be1  and V be2  at first and second nodes, respectively, said voltage V be1  set to a value V be1(I)  when i 1 =I or to a second value V be1(N*I)  when i 1 =N*I, and said voltage V be2  set to a value V be2(I)  when i 2 =I or to a second value V be2(N*I)  when i 2 =N*I; 
 
 an amplifier having an output, a non-inverting input and an inverting input, said non-inverting input connected to said second node, said inverting input connected to said first node through an input capacitor having a capacitance C 1 , and said amplifier's output coupled to said output terminal; 
 a feedback capacitor having a capacitance C 2  connected between said inverting input and a third node; 
 a first switch connected between said amplifier's inverting input and a fourth node; 
 a second switch connected between said third node and said fourth node, said fourth node coupled to the output of said amplifier; 
 a third switch connected between said third node and a circuit common point; and 
 a control circuit arranged to selectively operate said switches and said base-emitter voltage generating circuit to produce a temperature independent output voltage or a temperature dependent output voltage. 
 
   
   
     2. The voltage source circuit of  claim 1 , wherein said voltage source circuit is arranged such that said temperature independent output voltage is approximately given by:
     V   out   =V   be2(N*I) +2*( C 1/ C 2)*( V   be2(N*I)   −V   be1(I) ), 
 
     and said temperature dependent output voltage is approximately given by:
     V   out =2 *k *( C 1/ C 2)*( V   be2(I)   −V   be1(N*I) ), 
 
     where k is a proportionality constant. 
   
   
     3. A voltage source circuit capable of selectively providing a temperature independent or a proportional-to-absolute-temperature (PTAT) output voltage, comprising:
 an output terminal which provides said voltage source's output voltage V out ; 
 a base-emitter voltage generating circuit, comprising:
 a first current source which provides a current i 1  which is selectively set to a value I or a value N*I; 
 a second current source which provides a current i 2  which is selectively set to a value I or a value N*I; 
 first and second pn junctions connected to conduct i 1  and i 2  and thereby establish first and second base-emitter voltages V be1  and V be2  at first and second nodes, respectively, said voltage V be1  set to a value V be1(I)  when i 1 =I or to a second value V be1(N*I)  when i 1 =N*I, and said voltage V be2  set to a value V be2(I)  when i 2 =I or to a second value V be2(N*I)  when i 2 =N*I; 
 
 an amplifier having an output, a non-inverting input and an inverting input, said non-inverting input connected to said second node, said inverting input connected to said first node through an input capacitor having a capacitance C 1 , and said amplifier's output coupled to said output terminal; 
 a feedback capacitor having a capacitance C 2  connected between said inverting input and a third node; 
 a first switch connected between said amplifier's inverting input and a fourth node; 
 a second switch connected between said third node and said fourth node, said fourth node coupled to the output of said amplifier; 
 a third switch connected between said third node and a circuit common point; and 
 a control circuit arranged to selectively operate said switches and said base-emitter voltage generating circuit to produce a temperature independent output voltage approximately given by:
     V   out   =V   be2(N*I) +2*( C 1/ C 2)*( V   be2(N*I)   V   be1(I) ), 
 
 
     or a PTAT output voltage approximately given by:
     V   out =2 *k *( C 1/ C 2)*( V   be2(I)   −V   be1(N*I) ), 
 
     where k is a proportionality constant. 
   
   
     4. The voltage source circuit of  claim 3 , further compromising a fourth switch connected between the non-inverting input of said amplifier and said third node, said control circuit when producing a temperature independent output voltage further arranged to operate said fourth switch such that said amplifier's input offset voltage is substantially eliminated from V out . 
   
   
     5. A voltage source circuit capable of selectively providing a temperature independent or a proportional-to-absolute-temperature (PTAT) output voltage, comprising:
 an output terminal which provides said voltage source's output voltage V out ; 
 a base-emitter voltage generating circuit, comprising:
 a first current source which provides a current i 1  which is selectively set to a value I or a value N*I; 
 a second current source which provides a current i 2  which is selectively set to a value I or a value N*I; 
 first and second pn junctions connected to conduct i 1  and i 2  and thereby establish first and second base-emitter voltages V be1  and V be2  at first and second nodes, respectively, said voltage V be1  set to a value V be1(I)  when i 1 =I or to a second value V be1(N*I)  when i 1 =N*I, and said voltage V be2  set to a value V be2(I)  when i 2 =I or to a second value V be2(N*I)  when i 2 =N*I; 
 
 an amplifier having an output, a non-inverting input and an inverting input, said non-inverting input connected to said second node, said inverting input connected to said first node through an input capacitor having a capacitance C 1 , and said amplifier's output coupled to said output terminal; 
 a feedback capacitor having a capacitance C 2  connected between said inverting input and a third node; 
 a first switch S 1  connected between said amplifier's inverting input and a fourth node; 
 a second switch S 2  connected between said third node and said fourth node, said fourth node coupled to the output of said amplifier; 
 a third switch S 3  connected between said third node and a circuit common point; and 
 a control circuit which operates said switches and said base-emitter voltage generating circuit during first and second operating phases to produce a temperature independent output voltage or a PTAT output voltage; 
 said control circuit when producing a temperature independent output voltage arranged to:
 during said first operating phase:
 operate said base-emitter voltage generating circuit such that said first and second nodes are at V be1(N*I)  and V be2(I) , respectively, 
 close S 1  and S 2  such that C 1  has a voltage across it equal to V be2(I) −V be1(N*I) +V os , where V os  is the amplifier's input offset voltage, 
 
 
 and during said second operating phase:
 operate said base-emitter voltage generating circuit such that said first and second nodes are at V be1(I)  and V be2(N*I) , respectively, and 
 open S 1  and S 3  such that, at the end of said second phase, said output voltage V out  is given by:
     V   out   =V   be2(N*I) +2*( C 1/ C 2)*( V   be2(N*I)   −V   be1(I) )+ V   os , 
 
 
 said control circuit when producing a PTAT output voltage arranged to:
 during said first operating phase:
 operate said base-emitter voltage generating circuit such that said first and second nodes are at V be1(N*I)  and V be2(I) , respectively, and 
 close S 1  and S 3  and open S 2  such that C 1  has a voltage across it equal to V be2(I) −V be1(N*I) +V os  and C 2  has a voltage across it equal to V be2 +V os , 
 
 
 and during said second operating phase:
 operate said base-emitter voltage generating circuit such that said first and second nodes are at V be1(I)  and V be2(I) , respectively, and 
 close S 2  and open S 1  and S 3  such that, at the end of said second phase, said output voltage V out  is given by:
     V   out =2 *k *( C 1/ C 2)*( V   be2(I)   −V   be1(N*I) ), 
 
 
 
     where k is a proportionality constant. 
   
   
     6. The voltage source circuit of  claim 5 , wherein first and second pn junctions comprise the base-emitter junctions of respective PNP transistors. 
   
   
     7. The voltage source circuit of  claim 5 , further comprising a fourth switch S 4  connected between the non-inverting input of said amplifier and said third node;
 said control circuit when producing a temperature independent output voltage further arranged to:
 during said first operating phase:
 close S 4  such that C 2  has a voltage across it equal to V os , 
 
 and during said second operating phase:
 open S 4  such that, at the end of said second phase, said output voltage V out  is given by:
     V   out   =V   be2(N*I) +2*( C 1/ C 2)*( V   be2(N*I)   −V   be1(I) ); 
 
 
 
 said control circuit when producing a PTAT output voltage further arranged to hold S 4  open during said first and second operating phases. 
 
   
   
     8. The voltage source circuit of  claim 5 , wherein said fourth node and said output terminal are connected to the output of said amplifier. 
   
   
     9. The voltage source circuit of  claim 5 , further comprising a resistive divider circuit connected between said amplifier output and said circuit common point, said voltage source circuit arranged to connect said fourth node and said output terminal to the output of said divider when producing a PTAT output voltage. 
   
   
     10. The voltage source circuit of  claim 9 , wherein said resistive divider circuit comprises:
 a first resistor connected between the output of said amplifier and a fifth node; 
 a second resistor connected between said fifth node and said circuit common point; 
 a fourth switch S 4  connected between the output of said amplifier and said output terminal; and 
 a fifth switch S 5  connected between said fifth node and said output terminal; 
 said control circuit when producing a temperature independent output voltage further arranged to close S 5  and open S 6 ; 
 said control circuit when producing a PTAT output voltage arranged to open S 5  and close S 6 , said output voltage V out  taken at the output of said amplifier. 
 
   
   
     11. The voltage source circuit of  claim 10 , wherein one of said first and second resistors is an adjustable resistor. 
   
   
     12. The voltage source circuit of  claim 11 , wherein said adjustable resistor is adjusted to obtain a desired value for proportionality constant k. 
   
   
     13. The voltage source circuit of  claim 5 , wherein first and second pn junctions comprise the base-emitter junctions of respective PNP transistors, said PNP transistors being parasitic substrate bipolar transistors. 
   
   
     14. A voltage source circuit capable of selectively providing a temperature independent or proportional-to-absolute-temperature (PTAT) output voltage, comprising:
 an output terminal which provides said voltage source's output voltage V out ; 
 a base-emitter voltage generating circuit, comprising:
 a first current source which provides a current i 1  which is selectively set to a value I or a value N*I; 
 a second current source which provides a current i 2  which is selectively set to a value I or a value N*I; 
 first and second pn junctions comprising the base-emitter junctions of respective bipolar transistors, connected to conduct i 1  and i 2  and thereby establish first and second base-emitter voltages V be1  and V be2  at first and second nodes, respectively, said voltage V be1  set to a value V be1(I)  when i 1 =I or to a second value V be1(N*I)  when i 1 =N*I, and said voltage V be2  set to a value V be2(I)  when i 2 =I or to a second value V be2(N*I)  when i 2 =N*I; 
 
 an amplifier having an output, a non-inverting input and an inverting input, said non-inverting input connected to said second node, said inverting input connected to said first node through an input capacitor having a capacitance C 1 , and said amplifier's output coupled to said output terminal; 
 a feedback capacitor having a capacitance C 2  connected between said inverting input and a third node; 
 a first switch S 1  connected between said amplifier's inverting input and a fourth node; 
 a second switch S 2  connected between said third node and said fourth node, said fourth node coupled to the output of said amplifier; 
 a third switch S 3  connected between said third node and a circuit common point; 
 a fourth switch S 4  connected between the non-inverting input of said amplifier and said third node; and 
 a control circuit which operates said switches and said base-emitter voltage generating circuit during first and second operating phases to produce a temperature independent output voltage or a PTAT output voltage; 
 said control circuit when producing a temperature independent output voltage arranged to:
 during said first operating phase:
 operate said base-emitter voltage generating circuit such that said first and second nodes are at V be1(N*I)  and V be2(I) , respectively, 
 close S 1  such that C 1  has a voltage across it equal to V be2(I) −V be1(N*I) +V os  and close S 4  such that C 2  has a voltage across it equal to V os , where V os , is the amplifier's input offset voltage, 
 
 
 and during said second operating phase:
 operate said base-emitter voltage generating circuit such that said first and second nodes are at V be1(I)  and V be2(N*I) , respectively, and 
 open S 1 , S 3  and S 4  and close S 2  such that, at the end of said second phase, said output voltage V out  is given by:
     V   out   =V   be2(N*I) +2*( C 1/ C 2)*( V   be2(N*I)   −V   be1(I) ); 
 
 
 said control circuit when producing a PTAT output voltage arranged to:
 during said first operating phase:
 operate said base-emitter voltage generating circuit such that said first and second nodes are at V be1(N*I)  and V be2(I) , respectively, and 
 
 close S 1  and S 3  and open S 2  and S 4  such that C 1  has a voltage across it equal to V be2 −V be1 +V os  and C 2  has a voltage across it equal to V be2 +V os , 
 
 and during said second operating phase:
 operate said base-emitter voltage generating circuit such that said first and second nodes are at V be1(I)  and V be2(I) , respectively, and 
 close S 2  and open S 1  and S 3  such that, at the end of said second phase, said output voltage V out  is given by:
     V   out =2 *k *( C 1/ C 2)*Δ V   be , 
 
 
 
     where k is a proportionality constant. 
   
   
     15. The voltage source circuit of  claim 14 , further comprising a resistive divider circuit, comprising:
 a first resistor connected between the output of said amplifier and a fifth node; 
 a second resistor connected between said fifth node and said circuit common point; 
 a fifth switch S 5  connected between the output of said amplifier and said output terminal; and 
 a sixth switch S 6  connected between said fifth node and said output terminal; 
 said control circuit when producing a temperature independent output voltage further arranged to close S 5  and open S 6 , said temperature independent output voltage taken at said output terminal; 
 said control circuit when producing a PTAT output voltage arranged to open S 5  and close S 6 , said PTAT output voltage taken at the output of said amplifier.