Temperature compensated low voltage reference circuit
Abstract
A temperature compensated low voltage reference circuit can be realized with a reduced operating voltage overhead. This is accomplished in several ways including minimizing drain voltage variation at the drains of two inter-connected transistors and implementing a current conveyer in order to adjust the temperature coefficient of an output current or voltage. Various combinations of voltage minimization and temperature coefficient adjustments may be used to design a reference circuit to a circuit designer's preference. A temperature compensated current source may also be created. The temperature compensated current source may be used to provide a wide range of output voltages. All of the reference circuits may be constructed with various types of transistors including DTMOS transistors.
Claims
exact text as granted — not AI-modified1. A low voltage reference circuit comprising:
first and second Bipolar Junction Transistors (BJTs) each having an associated operating current and having interconnected bases coupled with a common node;
a first resistor having first and second terminals, the first terminal coupled with an emitter of the first BJT transistor;
first and second Field Effect Transistors (FETs) having interconnected gates and interconnected sources;
a current-differencing amplifier having first and second input terminals and an output terminal, the first input terminal coupled with a collector of the first BJT, the second input terminal coupled with a collector of the second BJT, and the output terminal coupled with the interconnected gates of the first and second FETs, wherein a difference in operating currents of the first and second BJTs results in a corresponding output voltage at the output terminal;
voltage regulating circuitry coupled with a drain of the first and second FETs and the second terminal of the first resistor; whereby the voltage regulating circuitry minimizes the voltage difference between the drain of the first FET and the drain of the second FET;
a second resistor having first and second terminals, the second terminal coupled with the drain of the second FET; and
a third BJT having a base, a collector, and an emitter, the emitter coupled with the first terminal of the second resistor and the base coupled with the collector.
2. The low voltage reference circuit as in claim 1 , wherein the first and second BJTs are lateral BJTs each having a vestigial gate coupled with the interconnected bases of the first and second BJTs.
3. The low voltage reference circuit as in claim 1 , wherein the voltage regulating circuit further comprises:
an amplifier having first and second input terminals and an output; the first input terminal coupled with the drain of the first FET and the second input terminal coupled with the drain of the second FET; and
a third FET having a source, a gate, and a drain, the source being coupled with the drain of the first FET, the gate coupled with the output of the amplifier, and the drain coupled with the second terminal of the first resistor.
4. A low voltage reference circuit comprising:
first and second Bipolar Junction Transistors (BJTs) each having an associated operating current and having interconnected bases;
first and second Field Effect Transistors (FETs) having interconnected gates and interconnected sources;
a first resistor having first and second terminals, the first terminal coupled with an emitter of the first BJT and the second terminal coupled with an emitter of the second BJT and a drain of the first FET;
a current-differencing amplifier having first and second input terminals and an output terminal, the first input terminal coupled with a collector of the first BJT, the second input terminal coupled with a collector of the second BJT, and the output terminal coupled with the interconnected gates of the first and second FET, wherein a difference in operating currents of the first and second BJTs results in a corresponding output voltage at the output terminal;
a third BJT having a base, an emitter, and a collector, the emitter coupled with a drain of the second FET, the base coupled with the interconnected bases of the first and second BJTs, and the collector coupled to the base; and
a second resistor coupled with a collector of the third BJT.
5. The low voltage reference circuit as in claim 4 , wherein the first and second BJTs are lateral BJTs each having a vestigial gate coupled with the interconnected bases of the first and second BJTs.
6. The low voltage reference circuit as in claim 4 , wherein a unity gain amplifier is used to couple the collector of the third BJT to the base of the third BJT, thereby temperature curvature correcting the low voltage reference circuit.
7. A low voltage reference circuit comprising:
first and second Bipolar Junction Transistors (BJTs) each having an associated operating current and having interconnected bases connected at a common node;
first and second Field Effect Transistors (FETs) having interconnected gates and interconnected sources;
a first resistor having first and second terminals, the first terminal coupled with an emitter of the first BJT and the second terminal coupled with an emitter of the second BJT and a drain of the first FET;
a current-differencing amplifier having first and second input terminals and an output terminal, the first input terminal coupled with a collector of the first BJT, the second input terminal coupled with a collector of the second BJT, and the output terminal coupled with the interconnected gates of the first and second FETs, wherein a difference in operating currents of the first and second BJTs results in a corresponding output voltage at the output terminal;
a second resistor having first and second terminals, the second terminal coupled with a drain of the second FET; and
a temperature coefficient adjustment circuit coupled with the second terminal of the first resistor, wherein the temperature coefficient adjustment circuit is used to reduce a change in current through the second resistor due to temperature.
8. The low voltage reference circuit as in claim 7 , wherein the first and second BJTs are lateral BJTs each having a vestigial gate coupled with the interconnected bases of the first and second BJTs.
9. The low voltage reference circuit as in claim 7 wherein temperature coefficient adjustment circuit is a current conveyer, the current conveyer comprising:
an amplifier having first and second inputs and an output, the second input coupled with the second terminal of the first resistor;
third and fourth FETs having interconnected gates and interconnected sources, wherein the interconnected gates are coupled with the output of the amplifier, a drain of the third FET is coupled with the first input of the amplifier, and a drain of the fourth FET is coupled with the drain of the second FET; and
a third resistor having first and second terminals, the first terminal coupled with the first input of the amplifier.
10. The low voltage reference circuit as in claim 7 , wherein temperature coefficient adjustment circuit is a third resistor coupled with a drain of the first FET.
11. A low voltage reference circuit comprising:
first and second Bipolar Junction Transistors (BJTs) each having an associated operating current and having interconnected bases connected at a common node;
a first resistor having first and second terminals, the first terminal coupled with an emitter of the first BJT;
first and second Field Effect Transistors (FETs) having interconnected gates and interconnected sources;
a current-differencing amplifier having first and second input terminals and an output terminal, the first input terminal coupled with a collector of the first BJT, the second input terminal coupled with a collector of the second BJT, and the output terminal coupled with the interconnected gates of the first and second FETs, wherein a difference in operating currents of the first and second BJTs results in a corresponding output voltage at the output terminal;
a second resistor coupled with the second terminal of the first resistor;
voltage regulating circuitry coupled with a drain of the first and second FETs, the second terminal of the first resistor, and a third resistor, whereby the voltage regulating circuitry minimizes the voltage difference between the drain of the first FET and the drain of the second FET.
12. The low voltage reference circuit as in claim 11 , wherein the first and second BJTs are lateral BJTs each having a vestigial gate coupled with the interconnected bases of the first and second BJTs.
13. The low voltage reference circuit as in claim 11 , wherein the voltage regulating circuit further comprises:
an amplifier having first and second input terminals and an output; the first input terminal coupled with the drain of the first FET and the second input terminal coupled with the drain of the second FET; and
a third FET having a source, a gate, and a drain, the source being coupled with the drain of the first FET, the gate coupled with the output of the amplifier, and the drain coupled with the second terminal of the first resistor.
14. The low voltage reference circuit as in claim 11 , wherein the voltage regulating circuit further comprises:
an amplifier having first and second input terminals and an output; the first input terminal coupled with the drain of the first FET and the second terminal of the first resistor, and the second input terminal coupled with the drain of the second FET; and
a third FET having a source, a gate, and a drain, the source being coupled with the drain of the second FET, the gate coupled with the output of the amplifier, and the drain coupled with the third resistor.
15. A low voltage reference circuit comprising:
first and second Bipolar Junction Transistors (BJTs) each having an associated operating current and having interconnected bases coupled with a voltage source;
first and second Field Effect Transistors (FETs) having interconnected gates and interconnected sources;
a first resistor having first and second terminals, the first terminal coupled with an emitter of the first BJT and the second terminal coupled with an emitter of the second BJT and a drain of the first FET;
a current-differencing amplifier having first and second input terminals and an output terminal, the first input terminal coupled with a collector of the first BJT, the second input terminal coupled with a collector of the second BJT, and the output terminal coupled with the interconnected gates of the first and second FETs, wherein a difference in operating currents of the first and second BJTs results in a corresponding output voltage at the output terminal;
a third BJT having a base coupled with the voltage source and an emitter coupled with a drain of the second FET;
a second resistor having first and second terminals, the first terminal coupled with a collector of the third BJT; and
a third resistor having first and second terminals, the first terminal coupled with the drain of the first FET.
16. The low voltage reference circuit as in claim 15 , wherein the first and second BJTs are lateral BJTs each having a vestigial gate coupled with the interconnected bases of the first and second BJTs.
17. The low voltage reference circuit as in claim 15 , further comprising a fourth resistor having first and second terminals, the first terminal coupled with the second terminal of the third resistor and the first terminal being coupled to the interconnected bases of the first and second BJTs and the base of the third BJT, wherein the voltage source is provided at the first terminal of the fourth resistor.
18. The low voltage reference circuit as in claim 17 , wherein a unity gain amplifier is used to couple the first terminal of the fourth resistor to the interconnected bases of the first and second BJTs and the base of the third BJT, thereby temperature curvature correcting the low voltage reference circuit.
19. A low voltage current source, comprising:
first and second Bipolar Junction Transistors (BJTs) each having an associated operating current and having interconnected bases coupled with a voltage source;
a first resistor having first and second terminals, the first terminal coupled with an emitter of the first BJT and the second terminal coupled with an emitter of the second BJT;
a first Field Effect Transistor (FETs) having a drain coupled with the second terminal of the first resistor;
a current-differencing amplifier having first and second input terminals, an output terminal, and a ground terminal, the first input terminal coupled with a collector of the first BJT, the second input terminal coupled with a collector of the second BJT, and the output terminal coupled with a gate of the first FET, wherein a difference in operating currents of the first and second BJTs results in a corresponding output voltage at the output terminal; and
a second resistor having first and second terminals, the first terminal coupled with the drain of the first FET and the second terminal coupled to the ground terminal of the current-differencing amplifier.
20. The low voltage current source as in claim 19 , wherein the first and second BJTs are lateral BJTs each having a vestigial gate coupled with the interconnected bases of the first and second BJTs.
21. The low voltage current source as in claim 19 , wherein a third resistor is used to couple the second terminal of the second resistor to the ground terminal of the current-differencing amplifier.
22. The low voltage current source as in claim 19 , wherein a third resistor is coupled with the ground terminal of the current-differencing amplifier so as to produce a temperature invariant voltage.
23. The low voltage current source as in claim 22 , wherein a fourth resistor is coupled with the ground terminal of the current-differencing amplifier so as to produce a temperature invariant voltage.Cited by (0)
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