Reference cells for TCCT based memory cells

Abstract

A reference cell produces a reference current that is about half of the current produced by a memory cell. The reference cell is essentially the same as the memory cell with an additional current reduction device that can be a transistor. Adjusting a reference voltage applied to the transistor allows the reference current to be varied. A control circuit to produce the reference voltage includes dedicated memory and reference cells and a feedback circuit that compares the two cells' currents. The feedback circuit applies the reference voltage to the reference cell of the control circuit and adjusts the reference voltage until the current from the reference cell is about half of the current from the memory cell. The reference voltage is then applied to other reference cells in a memory array.

1. A memory array comprising:
 a memory cell having a first voltage applied thereto and including a logical state and configured to generate a first current on a first bit line; 
 a reference voltage generator circuit having the first voltage applied thereto and configured to generate a reference voltage; 
 a reference cell configured to receive the reference voltage and to generate a second current on a second bit line; 
 means for determining the logical state of the memory cell by comparing the first current to the second current; and 
 first and second word lines; 
 wherein the memory cell is a TCCT based memory cell including an NDR device disposed adjacent to the second word line, and a pass transistor with a gate coupled to the first word line. 
 
     
     
       2. The memory array of  claim 1  wherein the reference cell is a TCCT
 based cell including 
 an NDR device disposed adjacent to the second word line, and 
 a first pass transistor with a gate coupled to the first word line. 
 
     
     
       3. The memory array of  claim 1  wherein the means for determining the logical state of the TCCT based memory cell is a sense amplifier.