Display driver architecture for a liquid crystal display and method therefore

Abstract

Methods and apparatus are provided for driving a liquid crystal microdisplay. The apparatus comprises more than one display driver integrated circuit where a liquid crystal microdisplay receives video information from at least two separate and distinct display driver integrated circuits. One of the display driver integrated circuits is designated as producing a master clock. The internal clocks of the other display driver integrated circuits are compared to the master clock and adjusted to reduce the phase difference to a delay that does not produce visible artifacts on the microdisplay. The frame polarity is compared to be the same from each integrated circuit driving the microdisplay before outputting video information. A frame synchronization signal is also generated from each display driver integrated circuit to ensure that they are all ready to provide information to the microdisplay.

1. A method for driving a liquid crystal microdisplay comprising the steps of:
 coupling at least one channel from a first display driver integrated circuit to the liquid crystal microdisplay; 
 coupling at least one channel from a second display driver integrated circuit to the liquid crystal microdisplay; 
 comparing a frame synchronization signal from said first and second display driver integrated circuits; 
 initiating a transfer of video information through said at least one channel of said first and second display driver integrated circuits to the liquid crystal microdisplay when said frame synchronization signals indicate said first and second display driver integrated circuits are both prepared to transfer video information together to the liquid crystal microdisplay; 
 comparing a frame polarity signal from said first and second display driver integrated circuits; 
 preventing said transfer of video information to the liquid crystal microdisplay if a polarity of said video information provided by said first display driver integrated circuit differs from a polarity of said video information provided by said second display driver integrated circuit; and 
 correcting said polarity difference of said video information between said first and second display driver integrated circuits. 
 
   
   
     2. The method for driving the liquid crystal microdisplay as recited in  claim 1  further including the steps of:
 comparing a phase shift between internal clock signals of said first and second display driver integrated circuits; and 
 adjusting said internal clock signals of said first and second display driver integrated circuits to reduce said phase shift to prevent visual artifacts on the liquid crystal microdisplay. 
 
   
   
     3. The method for driving the liquid crystal microdisplay as recited in  claim 1  further including the steps of:
 providing timing signals to the liquid crystal microdisplay for transferring video information through said at least one channel of said first display driver integrated circuit wherein said timing signals is said internal clock or derived from said internal clock signal of said first display driver integrated circuit; and 
 providing timing signals to the liquid crystal microdisplay for transferring video information through said at least one channel of said second display driver integrated circuit wherein said timing signals is said internal clock signal of said second display driver integrated circuit. 
 
   
   
     4. The method for driving the liquid crystal microdisplay as recited in  claim 3  further including the steps of:
 calibrating digital to analog converters of said first display driver integrated circuit periodically; and 
 calibrating digital to analog converters of said second display driver integrated circuit periodically using comparators and reference voltages from said first display driver integrated circuit. 
 
   
   
     5. A color display system comprising:
 a first liquid crystal microdisplay; 
 a second liquid crystal microdisplay; 
 a third liquid crystal microdisplay; 
 a first display driver integrated circuit having a plurality of channel outputs for providing video information wherein said plurality of channel outputs is coupled to at least one of said first, second, or third liquid crystal microdisplay; and 
 a second display driver integrated circuit having a plurality of channel outputs for providing video information wherein said plurality of channel outputs is coupled to at least one of said first, second, or third liquid crystal microdisplays and wherein one of said first, second, or third microdisplays receives video information through channel outputs from both said first and second display driver integrated circuits; 
 wherein an internal clock of said first display driver integrated circuit is compared to an internal clock of said second display driver integrated circuit and phase adjusted to reduce a delay between said internal clocks of said first and second display driver integrated circuits such that video information is stored substantially at the same time in said first, second, or third microdisplay that receives video information from both said first and second display driver integrated circuits to prevent visual artifacts. 
 
   
   
     6. The color display system as recited in  claim 5  wherein video information is provided to said first and second display driver integrated circuits as digital video information. 
   
   
     7. The color display system as recited in  claim 6  further including: a first memory coupled to said first display driver integrated circuit for storing digital video information; and a second memory coupled to said second display driver integrated circuit for storing digital video information. 
   
   
     8. The color display system as recited in  claim 7  wherein digital to analog converters in said first and second display driver integrated circuits convert digital video information to analog video information for said first, second, and third liquid crystal microdisplays and wherein said digital to analog converters in said first and second display driver integrated circuits are calibrated periodically using same comparators and voltage references. 
   
   
     9. The color display system as recited in  claim 8  wherein said first and second display driver integrated circuits do not transfer video information to said until both are synchronized to do so and wherein said first and second display driver integrated circuits do not transfer information when a polarity of video information differs.