US7197588B2ExpiredUtilityA1
Interrupt scheme for an Input/Output device
Est. expiryMar 31, 2024(expired)· nominal 20-yr term from priority
G06F 9/542G06F 9/4812G06F 2209/481G06F 2209/543
79
PatentIndex Score
27
Cited by
52
References
24
Claims
Abstract
Provided are techniques for interrupt processing. An Input/Output device determines that an event has occurred. The Input/Output device determines a processor identifier and determines an event data structure identifier for an event data structure into which data for the event is stored using the processor identifier. The Input/Output device also determines a vector identifier for an interrupt message vector into which an interrupt message for the event is written. Then, interrupt message data is written to the interrupt message vector to generate an interrupt.
Claims
exact text as granted — not AI-modified1. A method for interrupt processing, comprising:
determining that an event has occurred;
determining a processor identifier;
determining an event data structure identifier for an event data structure into which data for the event is stored using the processor identifier, wherein the event data structure identifier is determined by accessing a message vector mapping structure using the processor identifier and an event code;
determining a vector identifier for an interrupt message vector; and
writing interrupt message data to the interrupt message vector to generate an interrupt.
2. The method of claim 1 , wherein the processor identifier is determined by applying a hash technique to a data packet to access a processor redirection/indirection structure.
3. The method of claim 1 , wherein the vector identifier is determined by accessing a message vector mapping structure using the processor identifier and an event code.
4. The method of claim 1 , further comprising:
writing an event entry to the event data structure identified by the event data structure identifier; and
advancing a write indicator.
5. The method of claim 1 , further comprising:
receiving an interrupt;
identifying an event data structure using the interrupt message data in the interrupt message vector; and
processing an event entry in the identified event data structure.
6. The method of claim 1 , further comprising:
determining whether the event is associated with data; and
determining a default processor identifier in response to determining that the event is not associated with data.
7. A method for interrupt processing, comprising:
determining that an event has occurred;
determining a processor identifier;
determining an event data structure identifier for an event data structure into which data for the event is stored using the processor identifier;
determining a vector identifier for an interrupt message vector, wherein the vector identifier is determined from a message vector mapping structure using the event data structure identifier as an index; and
writing interrupt message data to the interrupt message vector to generate an interrupt.
8. The method of claim 7 , wherein the event data structure identifier is determined by accessing a processor redirection/indirection structure using the processor identifier.
9. A system for interrupt processing, comprising:
an Input/Output device coupled to a Network Interface Controller bus; and
circuitry at the Input/Output device operable to:
determine that an event has occurred;
determine a processor identifier from a processor redirection/indirection structure;
determine an event data structure identifier for an event data structure into which data for the event is stored using the processor identifier, wherein the event data structure identifier is determined by accessing a message vector mapping structure using the processor identifier and an event code;
determine a vector identifier for an interrupt message vector into which an interrupt message is written; and
write interrupt message data to the interrupt message vector to generate an interrupt.
10. The system of claim 9 , wherein the processor identifier is determined by applying a hash technique to a data packet to access a processor redirection/indirection structure.
11. The system of claim 9 , wherein the vector identifier is determined by accessing a message vector mapping structure using the processor identifier and an event code.
12. The system of claim 9 , wherein the circuitry is operable to:
write an event entry to the event data structure identified by the event data structure identifier; and
advance a write indicator.
13. The system of claim 9 , further comprising:
an Input/Output device driver coupled to a bus; and
circuitry at the Input/Output device driver operable to:
receive an interrupt;
identify an event data structure using the interrupt message data in the interrupt message vector; and
process an event entry in the identified event data structure.
14. The system of claim 9 , wherein the circuitry is operable to:
determine whether the event is associated with data; and
determine a default processor identifier in response to determining that the event is not associated with data.
15. A system for interrupt processing, comprising:
an Input/Output device coupled to Network Interface Controller a bus; and
circuitry at the Input/Output device operable to:
determine that an event has occurred;
determine a processor identifier from a processor redirection/indirection structure;
determine an event data structure identifier for an event data structure into which data for the event is stored using the processor identifier;
determine a vector identifier for an interrupt message vector into which an interrupt message is written, wherein the vector identifier is determined from a message vector mapping structure using the event data structure identifier as an index; and
write interrupt message data to the interrupt message vector to generate an interrupt.
16. The system of claim 15 , wherein the event data structure identifier is determined by accessing a processor redirection/indirection structure using the processor identifier.
17. An article of manufacture for interrupt processing, wherein the article of manufacture is at an Input/Output device and is operable to:
determine that an event has occurred;
determine a processor identifier from a processor redirection/indirection structure;
determine an event data structure identifier for an event data structure into which data for the event is stored using the processor identifier, wherein the event data structure identifier is determined by accessing a message vector mapping structure using the processor identifier and an event code;
determine a vector identifier for an interrupt message vector into which an interrupt message for the event is stored; and
write interrupt message data to the interrupt message vector to generate an interrupt.
18. The article of manufacture of claim 17 , wherein the processor identifier is determined by applying a hash technique to a data packet to access a processor redirection/indirection structure.
19. The article of manufacture of claim 17 , wherein the vector identifier is determined by accessing a message vector mapping structure using the processor identifier and an event code.
20. The article of manufacture of claim 17 , wherein the article of manufacture is operable to:
write an event entry to the event data structure identified by the event data structure identifier; and
advance a write indicator.
21. The article of manufacture of claim 17 , wherein the Input/Output device is connected to a device driver and wherein an article of manufacture at the Input/Output device driver is operable to:
receive an interrupt;
identify an event data structure using the interrupt message data in the interrupt message vector; and
process an event entry in the identified event data structure.
22. The article of manufacture of claim 21 , wherein the article of manufacture is operable to:
determine whether the event is associated with data; and
determine a default processor identifier in response to determining that the event is not associated with data.
23. An article of manufacture for interrupt processing, wherein the article of manufacture is at an Input/Output device and is operable to:
determine that an event has occurred;
determine a processor identifier from a processor redirection/indirection structure;
determining an event data structure identifier for an event data structure into which data for the event is stored using the processor identifier;
determining a vector identifier for an interrupt message vector into which an interrupt message for the event is stored, wherein the vector identifier is determined from a message vector mapping structure using the event data structure identifier as an index; and
writing interrupt message data to the interrupt message vector to generate an interrupt.
24. The article of manufacture of claim 23 , wherein the event data structure identifier is determined by accessing processor redirection/indirection structure using the processor identifier.Cited by (0)
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