US7212021B2ExpiredUtilityA1

Manufacturing integrated circuits and testing on-die power supplies using distributed programmable digital current sinks

64
Assignee: INTEL CORPPriority: Mar 12, 2002Filed: Mar 12, 2002Granted: May 1, 2007
Est. expiryMar 12, 2022(expired)· nominal 20-yr term from priority
G01R 31/31721G01R 31/2839
64
PatentIndex Score
10
Cited by
9
References
29
Claims

Abstract

A method for designing and testing on-die power supply, power distribution, and noise suppression techniques for integrated circuits such as microprocessors is described. A network of time varying loads is distributed along the power supply grid to facilitate testing of new power supplies and grids and noise suppression techniques before design of the chip is completed. Several programmable current sinks are described for presenting loads according to a preferred test-waveform current. Transient, including droop detection, and static testing is easily performed using the described methods and circuitry.

Claims

exact text as granted — not AI-modified
1. An apparatus comprising:
 a plurality of current sink elements coupled to a sink output common to the plurality of current sink elements to sink current from signals at the common sink output; and 
 a delay line to propagate signals to control current sinking by one or more of the current sink elements, 
 wherein the delay line includes one or more of a plurality of delay elements having an output to control current sinking by a corresponding current sink element, and 
 wherein one or more of the current sink elements are to sink current from signals at the common sink output without sinking current from any signals propagated by the delay line. 
 
   
   
     2. The apparatus of  claim 1 , comprising a programmable variable delay element through which signals are to be propagated. 
   
   
     3. The apparatus of  claim 1 , wherein the delay line comprises delay elements to turn current sink elements on and off in succession. 
   
   
     4. The apparatus of  claim 1 , wherein an output for the delay line is coupled to an input for the delay line to enable oscillation. 
   
   
     5. The apparatus of  claim 4 , comprising a switch to disable oscillation. 
   
   
     6. The apparatus of  claim 4 , comprising a variable delay element through which signals are to be propagated. 
   
   
     7. The apparatus of  claim 6 , wherein the variable delay element is to control an on time or off time for sinking current. 
   
   
     8. The apparatus of  claim 6 , wherein the variable delay element is to control oscillation frequency. 
   
   
     9. The apparatus of  claim 1 , comprising switches coupled to select one or more delay elements to form the delay line. 
   
   
     10. The apparatus of  claim 1 , comprising switches coupled to select a feedback path for the delay line. 
   
   
     11. The apparatus of  claim 1 , comprising a multiplexer having inputs coupled to outputs of delay elements and having an output coupled to an input for the delay line. 
   
   
     12. The apparatus of  claim 1 , wherein at least one current sink element includes:
 a plurality of transistors, and 
 a shift register having outputs to control corresponding transistors. 
 
   
   
     13. The apparatus of  claim 1 , wherein at least one current sink element is programmable. 
   
   
     14. The apparatus of  claim 1 , comprising a power distribution grid coupled to the sink output. 
   
   
     15. The apparatus of  claim 14 , wherein signals at the common sink output are for a current test waveform to test the power distribution grid. 
   
   
     16. The apparatus of  claim 1 , comprising a gate having inputs coupled to switches to select an output for a delay element as an output for the delay line. 
   
   
     17. The apparatus of  claim 1 , comprising a pulse generator coupled to an input for the delay line. 
   
   
     18. The apparatus of  claim 17 , wherein the pulse generator is to produce pulses having a duration corresponding to a propagation delay of delay elements of the delay line. 
   
   
     19. The apparatus of  claim 1 , comprising:
 a plurality of gates having inputs coupled across corresponding delay elements of the delay line and having an output coupled to control a corresponding current sink element. 
 
   
   
     20. The apparatus of  claim 19 , wherein the delay line includes a variable delay element. 
   
   
     21. A method comprising:
 propagating signals over a delay line including one or more of a plurality of delay elements; and 
 controlling, by an output for one or more of the delay elements, current sinking by one or more of a plurality of current sink elements coupled to a sink output common to the plurality of current sink elements to sink current from signals at the common sink output without sinking current from any signals propagated over the delay line. 
 
   
   
     22. The method of  claim 21 , comprising programming one or more current sink elements. 
   
   
     23. The method of  claim 21 , comprising programming a variable delay element through which signals are to be propagated. 
   
   
     24. The method of  claim 21 , comprising:
 selecting one or more delay elements to form the delay line. 
 
   
   
     25. The method of  claim 21 , comprising:
 selecting a feedback path for the delay line. 
 
   
   
     26. The method of  claim 21 , wherein an output for the delay line is coupled to an input for the delay line to enable oscillation of signals, and wherein the method comprises controlling oscillation of signals. 
   
   
     27. The method of  claim 21 , comprising:
 testing a power distribution grid using signals at the common sink output. 
 
   
   
     28. The method of  claim 21 , comprising:
 testing a noise suppression technique using signals at the common sink output. 
 
   
   
     29. The method of  claim 21 , comprising:
 generating pulses on the delay line.

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