Coherent demodulation of hopped MSK waveforms system and method

Abstract

A method of demodulating a frequency hopped waveform is disclosed. The method comprises receiving an analog radio frequency signal, converting the analog signal to a digital pulse signal, and determining the I and Q bits in the digital pulse signal. The method also comprises derotating the Q bits by a ninety (90) degree phase shift. The method further comprises deriving an approximate phase angle for the pulse from the I and derotated Q bits.

1. A method of demodulating a frequency hopped waveform, comprising:
 receiving an analog radio frequency signal; 
 converting the analog signal to a digital pulse signal; 
 determining the I and Q bits in the digital pulse signal; 
 derotating the Q bits by a ninety (90) degree phase shift; and 
 deriving an approximate phase angle for the digital pulse signal from the I and derotated Q bits. 
 
   
   
     2. The method of  claim 1 , further comprising:
 using a plurality of phase reference bits embedded within the digital pulse signal to determine the direction of a one bit and a zero bit along the phase angle. 
 
   
   
     3. The method of  claim 2 , further comprising:
 identifying a plurality of data bits within the digital pulse signal. 
 
   
   
     4. The method of  claim 3 , further comprising:
 processing the data bits within the digital pulse signal according to the determined direction of the one bit and the zero bit. 
 
   
   
     5. The method of  claim 4 , further comprising:
 processing the data bits within the digital pulse signal according to the derived phase angle. 
 
   
   
     6. The method of  claim 1 , wherein the deriving is performed using a least squares fit algorithm. 
   
   
     7. The method of  claim 1 , wherein the method is applied to a Link-16 waveform. 
   
   
     8. The method of  claim 1 , wherein the digital pulse has a thirty-two (32) bit word length. 
   
   
     9. An apparatus for demodulating a frequency hopped waveform, comprising:
 a means for receiving an analog radio frequency signal; 
 a means for converting the analog signal to a digital pulse signal; 
 a means for determining quadrature bits in the digital pulse signal; 
 a means for shifting a portion of the quadrature bits by a minus ninety (90) degree phase shift; and 
 a means for deriving an approximate phase angle for the digital pulse signal from the unshifted and shifted bits of the digital pulse signal. 
 
   
   
     10. The apparatus of  claim 9 , further comprising:
 a means for determining from a plurality of phase reference bits received embedded within the digital pulse signal, the direction of a one bit and a zero bit along the phase angle. 
 
   
   
     11. The apparatus of  claim 10 , further comprising:
 a means for identifying a plurality of I and Q data bits within the digital pulse signal. 
 
   
   
     12. The apparatus of  claim 11 , further comprising:
 a means for processing the I and Q data bits according to the determined direction of the one bit and the zero bit. 
 
   
   
     13. The apparatus of  claim 12 , further comprising:
 a means for processing the I and Q data bits according to the derived phase angle. 
 
   
   
     14. A radio frequency receiver, comprising:
 an antenna coupled to a radio frequency circuitry for receiving radio frequency signals; 
 a processing device associated with a memory, the processing device coupled to the radio frequency circuitry; 
 a program stored in the memory and running on the processing device, the program deriving a phase angle of a signal pulse using a group of received phase reference bits and a plurality of I and Q bits and a least squares fitting algorithm and the program determining the direction of a one bit and a zero bit along the phase angled based on the phase reference bits. 
 
   
   
     15. The radio frequency receiver of  claim 14 , wherein the radio frequency signals are Link-16 waveforms. 
   
   
     16. The radio frequency receiver of  claim 14 , wherein the radio frequency signals are frequency hopped minimum shift keying signals. 
   
   
     17. The radio frequency receiver of  claim 14 , wherein the signal pulse has a thirty-two (32) bit word length. 
   
   
     18. The radio frequency receiver of  claim 14 , wherein the phase reference bits include a I and Q bits. 
   
   
     19. The radio frequency receiver of  claim 14 , wherein the least fitting algorithm is derived for implementation in hardware. 
   
   
     20. The radio frequency receiver of  claim 19 , wherein the hardware includes a cordic resolver circuit.