P
US7274361B2ExpiredUtilityPatentIndex 79

Display control device with multipurpose output driver

Assignee: MSTAR SEMICONDUCTOR INCPriority: Sep 26, 2003Filed: Sep 26, 2003Granted: Sep 25, 2007
Est. expirySep 26, 2023(expired)· nominal 20-yr term from priority
Inventors:CHANG CHIH-TIENHUANG TENG-HANNHUANG CHAO-PING
G09G 3/20G09G 3/3611
79
PatentIndex Score
10
Cited by
14
References
24
Claims

Abstract

A display control device includes a controller, a scaling engine, a timing controller, a selector and an interface circuit. The controller is for providing a mode-control signal. The scaling engine is for producing a first interface signal. The timing controller is for converting the first interface signal into a second interface signal. The selector selects either the first interface signal or the second interface signal to serve as a reference signal according to the mode-control signal. The interface circuit converts the reference signal into an output signal according to the mode-control signal. When the mode-control signal is under a first mode, the output signal is virtually the first interface signal. When the mode-control signal is under a second mode, the output signal is virtually the second interface signal. When the mode-control signal is under a third mode, the interface circuit converts the first interface signal into a third interface signal to serve as the output signal. When the mode-control signal is under a fourth mode, the interface circuit converts the second interface signal into a fourth interface signal to serve as the output signal.

Claims

exact text as granted — not AI-modified
1. A display control device, comprising:
 a controller for providing a mode-control signal; 
 a scaling engine for producing a first interface signal; 
 a timing controller for converting said first interface signal into a second interface signal; a selector for selecting either said first interface signal or said second interface signal to serve as a reference signal for output according to said mode-control signal; and 
 an interface circuit for converting said reference signal into an output signal according to said mode-control signal; 
 wherein, when said mode-control signal is under a first mode, said output signal is substantially said first interface signal; when said mode-control signal is under a second mode, said output signal is substantially said second interface signal; when 
 said mode-control signal is under a third mode, said interface circuit converts said first interface signal to a third interface signal to serve as said output signal thereof; 
 and when said mode-control signal is under a fourth mode, said interface circuit converts said second interface signal into a fourth interface signal to serve as said output signal. 
 
   
   
     2. The display control device as claimed in  claim 1 , further comprising a phase-locked loop for providing said interface circuit with a clock signal; wherein, when said mode-control signal is under either said first mode or said second mode, said clock signal has a first clock frequency; when said mode-control signal is under said third mode, said clock signal has a second clock frequency; and when said mode-control signal is under said fourth mode, said clock signal has a third clock frequency. 
   
   
     3. A display control method, comprising the steps of:
 a) providing a mode-control signal and a first interface signal; 
 b) converting said first interface signal into a second interface signal; 
 c) selecting either said first interface signal or said second interface signal as a reference signal according to said mode-control signal; and 
 d) converting said reference signal into an output signal according to said mode-control signal;
 wherein, when said mode-control signal is under a first mode, said output signal is substantially said first interface signal; when said mode-control signal is under a second mode, said output signal is substantially said second interface signal; when said mode-control signal is under a third mode, said first interface signal is converted into a third interface signal to serve as said output signal; and when said mode-control signal is under a fourth mode, said second interface signal is converted into a fourth interface signal to serve as said output signal. 
 
 
   
   
     4. The display control method as claimed in  claim 3 , wherein step (c) further comprises the steps of:
 generating a clock signal such that said reference signal is converted into said output signal in response to said clock signal; wherein, when said mode-signal is under either said first mode or said second mode, said clock signal has a first clock frequency; when said mode-control signal is under said third mode, said clock signal has a second clock frequency; and when said mode-control signal is under said fourth mode, said clock signal has a third clock frequency. 
 
   
   
     5. A display control device for processing an input image signal and providing an output image signal compatible with a panel module in a display system, comprising:
 a mode controller for producing a mode signal associated with said panel module; 
 a scaling engine for converting an input image signal to a first interface signal; 
 a timing controller for converting said first interface signal into a second interface signal; 
 a selector for selecting one of said first interface signal and said second interface signal in response to said mode signal; 
 an interface circuit for either bypassing said selected interface signal to serve as said output image signal or converting said selected interface signal into a differential interface signal to serve as said output image signal in reponse to said mode signal; and 
 a phase-locked loop for providing a clock signal to said interface circuit, wherein said clock signal has a first frequency when said selected interface signal is bypassed to serve as said output image signal and has a second frequency when said differential interface signal is provided to serve as said output image signal, wherein said second frequency is greater than said first frequency. 
 
   
   
     6. The display control device as claimed in  claim 5 , wherein said differential interface signal is a low-voltage differential signaling (LVDS) interface signal when said selected interface signal is a TTL interface signal. 
   
   
     7. The display control device as claimed in  claim 6 , wherein said second frequency is substantially seven times of said first frequency. 
   
   
     8. The display control device as claimed in  claim 5 , wherein said first interface signal is a transistor-transistor level (TTL) interface signal. 
   
   
     9. The display control device as claimed in  claim 5 , wherein said second interface signal is a TTL/TCON interface signal. 
   
   
     10. The display control device as claimed in  claim 5 , wherein said diffe 0 rential interface signal is a reduced swing differential signaling (RSDS) interface signal when said selected interface signal is a TTL/TCON interface signal. 
   
   
     11. The display control device a claimed in  claim 10 , wherein said second frequency is substantially two times of said first frequency. 
   
   
     12. A display control device for processing an input image signal and providing an output image signal compatible with a panel module in a display system, comprising:
 a mode controller for producing a mode signal associated with said panel module; 
 a scaling engine for converting an input image signal to a first interface signal;
 an interface circuit for either bypassing said first interface signal to serve as said output image signal or converting said first interface signal into a second interface signal to serve as said output image signal in response to said mode signal; and 
 
 a phase-locked loop for providing a clock signal to said interface circuit, wherein said clock signal has a first frequency when said selected interface signal is bypassed to serve as said output image signal and has a second frequency when said differential interface signal is provided to serve as said output image signal, wherein said second frequency is greater than said first frequency. 
 
   
   
     13. The display control device as claimed in  claim 12 , wherein said second interface signal is a low-voltage differential signaling (LVDS) interface signal when said first interface signal is a TTL interface signal. 
   
   
     14. The display control device as claimed in  claim 12 , wherein said differential interface signal is a reduced swing differential signaling (RSDS) interface signal when said selected interface signal is a TTL/TCON interface signal. 
   
   
     15. A method for processing an input image signal and providing an output image signal compatible with a panel module in a display system, comprising the following steps of;
 producing a mode signal associated with said panel module; 
 converting an input image signal to a first interface signal; 
 converting said first interface signal into a second interface signal; 
 selecting one of said first interface signal and said second interface signal in response to said mode signal; 
 bypassing said selected interface signal to serve as said output image signal or converting said selected interface signal into a differential interface signal to serve as said output image signal in response to said mode signal; and 
 providing a clock signal, wherein said clock signal has a first frequency when said selected interface signal is bypassed to serve as said output image signal and has a second frequency when said differential interface signal is provided to serve as said output image signal, wherein said second frequency is greater than said first frequency. 
 
   
   
     16. The method as claimed in  claim 15 , wherein said first interface signal is a transistor-transistor level (TTL) interface signal. 
   
   
     17. The method as claimed in  claim 15 , wherein said second interface signal is a TTL/TCON interface signal. 
   
   
     18. The method as claimed in  claim 15 , wherein said differential interface signal is a low-voltage differential signaling (LVDS) interface signal when said selected interface signal is a TTL interface signal. 
   
   
     19. The method as claimed in  claim 18 , wherein said second frequency is substantially seven times of said first frequency. 
   
   
     20. The method as claimed in  claim 15 , wherein said differential interface signal is a reduced swing differential signaling (RSDS) interface signal when said selected interface signal is a TTL/TCON interface signal. 
   
   
     21. The method a claimed in  claim 20 , wherein said second frequency is substantially two times of said first frequency. 
   
   
     22. A method for processing an input image signal and providing an output image signal compatible with a panel module in a display system, comprising the following steps of:
 producing a mode signal associated with said panel module; 
 converting an input image signal to a first interface signal;
 either bypassing said first interface signal to serve as said output image signal or converting said first interface signal into a second interface signal to serve as said output image signal in response to said mode signal; and 
 
 providing a clock signal, wherein said clock signal has a first frequency when said first interface signal is bypassed to serve as said output image signal and has a second frequency when said second interface signal is provided to serve as said output image signal, wherein said second frequency is greater than said first frequency. 
 
   
   
     23. The method as claimed in  claim 22 , wherein said second interface signal is a low-voltage differential signaling (LVDS) interface signal when said first interface signal is a TTL interface signal. 
   
   
     24. The method as claimed in  claim 22 , wherein said differential interface signal is a reduced swing differential signaling (RSDS) interface signal when said selected interface signal is a TTL/TCON interface signal.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.