P
US7298203B2ExpiredUtilityPatentIndex 71

Amplification system capable of reducing DC offset

Assignee: SUNPLUS TECHNOLOGY CO LTDPriority: Mar 16, 2005Filed: Mar 2, 2006Granted: Nov 20, 2007
Est. expiryMar 16, 2025(expired)· nominal 20-yr term from priority
Inventors:WANG YAO-CHICHANG YING-TANG
H03F 2200/294H03F 3/45475H03F 3/45968H03F 3/45183H03F 3/45744H03F 2200/372
71
PatentIndex Score
7
Cited by
3
References
12
Claims

Abstract

An amplification system capable of reducing DC offset in a baseband signal, which has first and second differential output terminals, first and second low pass filters, and first and second amplifiers. The first low pass filter filters a first input signal to thus generate a first filtered signal. The first amplifier amplifies the first input signal and the first filtered signal to thus generate a first amplified signal. The second low pass filter filters a second input signal to thus generate a second filtered signal. The second amplifier amplifies the second input signal and the second filtered signal to thus generate a second amplified signal. The system couples the first and second amplified signals at the first and the second differential output terminals to thus reduce the DC offset of a differential voltage signal output by the first and second differential output terminals.

Claims

exact text as granted — not AI-modified
1. An amplification system capable of reducing direct current (DC) offset in a signal, comprising:
 a first differential input terminal and a second differential input terminal, which receive a first input signal and a second input signal respectively; 
 a first differential output terminal and a second differential output terminal; 
 a first low pass filter, which is connected to the first differential input terminal to filter the first input signal to thus generate a first filtered signal; 
 a first amplifier having a first input and a second input coupled to the first differential input terminal and the first low pass filter, respectively, and a first output and a second output coupled to the first differential output terminal and the second differential output terminal, respectively, in order to amplify the first input signal and the first filtered signal to thus generate a first amplified signal at the first output and the second output; 
 a second low pass filter, which is connected to the second differential input terminal to filter the second input signal to thus generate a second filtered signal; and 
 a second amplifier having a first input and a second input coupled to the second low pass filter and the second differential input terminal, respectively, and a first output and a second output coupled to the first differential output terminal and the second differential output terminal, respectively, in order to amplify the second input signal and the second filtered signal to thus generate a second amplified signal at the first output and the second output, whereby the first amplified signal is cross coupled to the second amplified signal at the first differential output terminal and second differential output terminal. 
 
   
   
     2. The system as claimed in  claim 1 , wherein the first low pass filter and the second low pass filter filter out all signals whose frequencies outside a band around direct current. 
   
   
     3. The system as claimed in  claim 1 , wherein the first low pass filter comprises a first resistor and a first capacitor. 
   
   
     4. The system as claimed in  claim 3 , wherein the first resistor has one end connected to the first differential input terminal and the other end connected to the first amplifier and one end of the first capacitor, and the other end of the first capacitor is connected to a ground node. 
   
   
     5. The system as claimed in  claim 4 , wherein the first resistor is a switch resistor bank. 
   
   
     6. The system as claimed in  claim 4 , wherein the first capacitor is a switch capacitor bank. 
   
   
     7. The system as claimed in  claim 1 , wherein the second low pass filter comprises a second resistor and a second capacitor. 
   
   
     8. The system as claimed in  claim 7 , wherein the second resistor has one end connected to the second differential input terminal and the other end connected to the second amplifier and one end of the second capacitor, and the other end of the second capacitor is connected to the ground node. 
   
   
     9. The system as claimed in  claim 8 , wherein the second resistor is a switch resistor bank. 
   
   
     10. The system as claimed in  claim 8 , wherein the second resistor is a switch capacitor bank. 
   
   
     11. The system as claimed in  claim 1 , wherein the first and the second amplifiers are matched to each other. 
   
   
     12. The system as claimed in  claim 1 , wherein the first and the second amplifiers have a same gain.

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