Method of fabricating contact line of liquid crystal display device

Abstract

A contact line structure for a liquid crystal display device includes a metal line on an array substrate, a silicide layer on the metal line, an insulating layer having a contact hole exposing a first portion of the silicide layer, and a transparent conducting terminal in and on the contact hole, wherein the insulating layer is adjacent to the contact hole.

1. A method of fabricating a contact line structure for a liquid crystal display device, comprising:
 depositing a metal material on an array substrate; 
 forming a metal line on an array substrate by etching the metal material; 
 forming a silicide layer on the metal line in direct contact with upper and side surfaces of the metal line and the silicide layer is formed in a different layer from the metal line; 
 forming an insulating layer having a contact hole exposing a first portion of the silicide layer; and 
 forming a transparent conducting terminal in and on the contact hole, 
 wherein the insulating layer is adjacent to the contact hole. 
 
     
     
       2. The method according to  claim 1 , wherein the steps of forming the metal line and the silicide layer include:
 depositing a metal material on the array substrate; 
 forming the suicide layer on the metal material; and 
 forming the metal line by etching the silicide layer and the metal material. 
 
     
     
       3. The method according to  claim 1 , wherein the steps of forming the metal line and the silicide layer include:
 depositing a metal material on the array substrate; 
 forming the metal line by etching the metal material; and 
 forming the silicide layer to cover the first portion of the metal line. 
 
     
     
       4. The method according to  claim 1 , wherein the step of forming the silicide layer is performed before the step of forming an insulating layer. 
     
     
       5. The method according to  claim 1 , wherein the metal line includes one of chrome Cr, molybdenum Mo, tungsten W, titanium Ti, tantalum Ta, and a conductive metal alloy. 
     
     
       6. The method according to  claim 1 , wherein the step of forming a silicide layer includes a plasma process using a silane group gas containing silicon. 
     
     
       7. The method according to  claim 6 , wherein the plasma process is performed at a power of about 100 Watt or less, a pressure of about 110 Pa, a temperature of about 250° C. to about 500° C., and a gas flow of about 100 SCCM or less. 
     
     
       8. The method according to  claim 6 , wherein the silane group gas is one of SiH 4 , Si 2 H 6 , and Si 3 H 8 . 
     
     
       9. The method according to  claim 1 , wherein the insulating layer includes one of an organic insulating material group containing Benzocyclobutene (BCB) or a photoacrylic resin. 
     
     
       10. The method according to  claim 1 , wherein the transparent conducting terminal includes a transparent conducting oxide. 
     
     
       11. The method according to  claim 1 , wherein the step of forming a metal line includes simultaneous steps of forming a gate line arranged along a first direction on the array substrate, forming a gate electrode protruding from the gate line, and forming a storage lower electrode in a storage capacitor region of an adjacent gate line. 
     
     
       12. The method according to  claim 11 , further comprising:
 forming a gate insulating layer on the gate electrode; 
 forming an active layer on the gate insulating layer above the gate electrode; 
 forming a data line perpendicular to the gate line to define a pixel region; 
 simultaneously forming a data pad at one end of the data line, and forming a source electrode above the gate electrode to overlap with a first side of the active layer when forming the data line; and 
 simultaneously forming a drain electrode to overlap a second side of the active layer at a fixed interval apart from the source electrode, and forming the storage upper electrode in the storage capacitor region of the adjacent gate line when forming the data line. 
 
     
     
       13. The method according to  claim 1 , wherein the transparent conducting terminal is a gate pad terminal. 
     
     
       14. The method according to  claim 13 , wherein the step of forming a gate pad terminal includes simultaneously forming a data pad terminal and a pixel electrode.