Real-time configurable masking

Abstract

Methods, systems, and media to define a portion of a circuit pattern with a source of real-time configurable imaging are disclosed. Embodiments include hardware and/or software for directing a beam through a mask onto a wafer surface to outline a circuit pattern having an undefined area, directing a second beam to the semiconductor wafer surface to define a circuit structure in the undefined area to complete the circuit pattern on the semiconductor wafer surface, and directing the second beam onto a source of real-time configurable imaging. Embodiments may also include a mask to include an undefined area incorporated into the circuit pattern to leave a critical structure of the circuit pattern undefined. Several embodiments include a photolithography system including an exposure tool, a mask, a source of real-time configurable imaging, and addressing circuitry.

1. A method to create an image on a wafer surface, comprising:
 directing a first exposure beam through a mask onto the wafer surface to outline a circuit pattern having an undefined area; and 
 adjusting a source of real-time configurable imaging to mask a second exposure beam, redirecting or blocking a first portion of the second exposure beam to prevent exposure of the wafer surface by the first portion and directing a second portion of the second exposure beam onto the wafer surface to expose the wafer surface to define a circuit structure in the undefined area to complete the circuit pattern on the wafer surface. 
 
     
     
       2. The method of  claim 1 , further comprising projecting the second exposure beam toward a digital micromirror device. 
     
     
       3. The method of  claim 2 , wherein projecting the second exposure beam comprises modifying a layer of photoresist on the wafer surface to create an etch stop that outlines the circuit pattern. 
     
     
       4. The method of  claim 2 , wherein the adjusting a source of real-time configurable imaging comprises adjusting an array of micromechanical mirrors of a digital micromirror device to reflect the second exposure beam to expose a layer of photoresist to complement an etch stop with a circuit structure, the array of micromechanical mirrors to be capable of real-time, individual tuning to reflect the circuit structure. 
     
     
       5. The method of  claim 2 , wherein directing the first exposure beam comprises directing the first exposure beam onto the wafer surface during exposure of the wafer surface via the second exposure beam. 
     
     
       6. The method of  claim 1 , wherein directing the first exposure beam comprises scanning the wafer surface. 
     
     
       7. The method of  claim 1 , wherein directing the first exposure beam comprises modifying a layer of photoresist on the wafer surface to create an etch stop that outlines the circuit pattern. 
     
     
       8. The method of  claim 1 , wherein the directing comprises directing a first exposure beam through a mask onto the wafer surface to outline a circuit pattern having an undefined area, wherein the undefined area comprises a critical structure of a circuit pattern. 
     
     
       9. The method of  claim 1 , wherein the directing the first exposure beam comprises:
 projecting a first exposure beam to the wafer surface and 
 filtering the first exposure beam with a mask to modify a layer of photoresist on the wafer surface to create an etch stop that outlines an undefined area comprising an incomplete circuit pattern. 
 
     
     
       10. The method of  claim 1 , wherein adjusting comprises applying a voltage across a cell to build a circuit pattern on the wafer surface, wherein the cell is selected from a cell group comprising a Kerr cell and a Pockel cell. 
     
     
       11. The method of  claim 1 , wherein adjusting comprises:
 positioning mirrors of a digital micromirror device to reflect a second exposure beam onto the wafer surface to define a circuit structure in the undefined area to complete the circuit pattern on the wafer surface and 
 directing the second exposure beam onto the digital micromirror device. 
 
     
     
       12. The method of  claim 1 , wherein directing the first exposure beam comprises directing the first exposure beam onto the wafer surface prior to exposing the wafer surface via the second exposure beam. 
     
     
       13. The method of  claim 1 , wherein adjusting the source of real-time configurable imaging comprises adjusting the first and second portions of the second exposure beam to expose the wafer in conjunction with exposure of the wafer by the first exposure beam through the mask via a scanner. 
     
     
       14. The method of  claim 1 , wherein adjusting the source of real-time configurable imaging comprises adjusting the first and second portions of the second exposure beam to expose the wafer in conjunction with exposure of the wafer by the first exposure beam through the mask via a step-and-scan system. 
     
     
       15. The method of  claim 1 , wherein adjusting the source of real-time configurable imaging comprises adjusting the first and second portions of the second exposure beam between exposures of the wafer to define a distinct circuit structure in another undefined area of a different exposure field on the wafer. 
     
     
       16. The method of  claim 1 , wherein adjusting the source of real-time configurable imaging comprises adjusting the first and second portions of the second exposure beam to connect circuits in the circuit pattern defined via exposure through the mask by the first exposure beam. 
     
     
       17. The method of  claim 1 , wherein adjusting the source of real-time configurable imaging comprises adjusting the first and second portions of the second exposure beam to disconnect circuits in the circuit pattern defined via exposure through the mask by the first exposure beam. 
     
     
       18. The method of  claim 1 , wherein adjusting the source of real-time configurable imaging comprises adjusting the first and second portions of the second exposure beam in response to a design decision at the time of manufacture to connect or disconnect missing links within the circuit pattern defined via exposure through the mask by the first exposure beam. 
     
     
       19. The method of  claim 1 , wherein adjusting the source of real-time configurable imaging comprises adjusting the first and second portions of the second exposure beam to connect or disconnect links for the circuit pattern defined via exposure through the mask by the first exposure beam, wherein the circuit pattern resides on another layer of the wafer.