Simple and robust digital code tracking loop for wireless communication systems

Abstract

A simple and robust CTL is used for time tracking of multipath components of a spread spectrum signal transmitted over a wireless multipath fading channel. A digital code-tracking loop includes the implementations of despreading early and late data samples by use of a pseudonoise sequence, an error signal output generated by the despreading, and adjustment for a plurality of on-time, early and late samples, a data rate of a control signal provided as a fractional proportion of a data rate of error signals.

1. A digital code-tracking loop configured for operation with wireless communications transmitted in a predetermined slotted time frame format comprising:
 a despreader configured to despread early and late data samples by use of a pseudonoise sequence; 
 an early-late detector configured to generate error signals from the output of the despreader; 
 a feedback loop configured to provide timing tracking for a plurality of on-time, early and late samples, and to provide an adjustment based on a sign of an accumulation of the generated error signals, but not the magnitude of the samples or error signals, using a control signal such that a data rate of the control signal is a fractional proportion of a data rate of said generated error signals and such that updated timing tracking is provided every 2 frames. 
 
   
   
     2. The digital code-tracking loop of  claim 1 , wherein:
 the despreader is configured to despread data samples that include early despread data samples S e (k) and late despread data samples S l (k) wherein each S e (k) and S l (k) is provided as a complex number and k represents the kth data in a time domain; and 
 the early-late detector is configured to generate the error signals as E r (k) according to the following equation:
     E   r ( k )=| S   e ( k )| 2   −|S   l ( k )| 2 . 
 
 
   
   
     3. The digital code-tracking loop of  claim 1 , wherein:
 the early-late detector is configured to detect early and late samples defined as values at half chip interval earlier and half chip interval later than on-time values, respectively. 
 
   
   
     4. The digital code tracking loop of  claim 3 , wherein the code tracking loop is configured to select an on-time sample, used for despreading, demodulation and rake combining, for every N samples, where N equals a number of samples per chip. 
   
   
     5. The digital code tracking loop of  claim 3 , wherein:
 the despreader is configured to despread data samples from a plurality of slots of a dedicated physical control channel, each slot including 10 symbols, the 10 symbols providing pilot, transmit power control and transport format combination indicator (TFCI) bits. 
 
   
   
     6. The digital code-tracking loop of  claim 1 , wherein the code tracking loop is configured to provide timing tracking of multipath components of a direct sequence spread spectrum signal over a wireless multipath fading channel. 
   
   
     7. A radio transmission controller configured to implement a digital code-tracking loop and configured for operation with wireless communications transmitted in a predetermined slotted time frame format, the radio transmission controller comprising:
 a despreading circuit configured to despread early and late data samples by use of a pseudonoise sequence; 
 an early-late detector circuit configured to generate error signals from the output of the despreading circuit; 
 a circuit configured to generate control signals based on a sign but not a magnitude of an accumulation of the generated error signals at a data rate that is a fractional proportion of a data rate of said error signals; and 
 a circuit configured to adjust timing tracking for a plurality of on-time, early and late samples based on said control signals, but not the magnitude of the samples or error signals such that updated timing tracking is provided every 2 frames. 
 
   
   
     8. The radio transmission controller of  claim 7 , wherein:
 the despreading circuit is configured to despread data samples that include early despread data samples S e (k) and late despread data samples S l (k), wherein each S e (k) and S l (k) is provided as a complex number and k represents the kth data in a time domain; and 
 the early-late detector circuit is configured to generate the error signals as E r (k) according to the following equation:
     E   r ( k )=| S   e ( k )| 2   −|S   l ( k )| 2 . 
 
 
   
   
     9. The radio transmission controller of  claim 7 , wherein said early-late detector circuit is configured to detect early and late samples defined as values at half chip interval earlier and half chip interval later than on-time values, respectively. 
   
   
     10. The radio transmission controller of  claim 9 , wherein the code tracking loop is configured to select an on-time sample, used for despreading, demodulation and rake combining, for every N samples, where N equals a number of samples per chip. 
   
   
     11. The radio transmission controller of  claim 9  wherein:
 the despreading circuit is configured to despread data samples from a plurality of slots of a dedicated physical control channel, each slot including 10 symbols, the 10 symbols providing pilot, transmit power control and transport format combination indicator (TFCI) bits. 
 
   
   
     12. The radio transmission controller of  claim 7 , wherein the code tracking loop is configured to provide timing tracking of multipath components of a direct sequence spread spectrum signal over a wireless multipath fading channel. 
   
   
     13. The radio transmission controller of  claim 7 , comprising a joint error signal calculator circuit provided as the early-late detector circuit configured to generate the error signals for the code tracking loop that is further configured to generate error signals for a second digital code tracking loop. 
   
   
     14. The radio transmission controller of  claim 13 , wherein the joint error signal calculator is configured to provide an indication of a relative delay τ between two different multipath components of a composite signal. 
   
   
     15. The radio transmission controller of  claim 14 , wherein the joint error signal calculator is configured to provide the relative delay τ between the two different multipath components as an indication of a delay for signal interference calculation. 
   
   
     16. A method for receiving spread spectrum signals by providing a digital code-tracking loop for use with wireless communications transmitted in a predetermined slotted time frame format comprising:
 despreading early and late data samples by use of a pseudonoise sequence; 
 generating error signals from the output generated by the despreading; and 
 providing an adjustment for providing timing tracking for a plurality of on-time, early and late samples, the adjustment determined by a control signal, but not the magnitude of the samples or error signals, the control signal based on a sign but not a magnitude of an accumulation of the generated error signals such that a data rate of the control signal is a fractional proportion of a data rate of the error signals and such that updated timing tracking is provided every 2 frames. 
 
   
   
     17. The method of  claim 16 , wherein the despread data samples include early despread data samples S e (k) and late despread data samples S l (k) and wherein:
 each S e (k) and S l (k) is provided as a complex number, k, that represents a kth data in a time domain; and 
 the error signals are provided as E r (k) according to the following equation:
     E   r ( k )=| S   e ( k )| 2   −|S   l ( k )| 2 . 
 
 
   
   
     18. The method of  claim 16 , wherein the early and late samples are defined in the despreading as values at half chip interval earlier and half chip interval later than on-time values, respectively. 
   
   
     19. The method of  claim 18 , wherein for every N samples, where N equals a number of samples per chip, one sample provides an on-time synchronized sample, used for despreading, demodulation and rake combining, the code tracking loop selecting the on-time sample. 
   
   
     20. The method of  claim 18 , wherein:
 the despreading despreads data samples from a plurality of slots of a dedicated physical control channel, each slot including 10 symbols, the 10 symbols providing pilot, transmit power control and transport format combination indicator (TFCI) bits. 
 
   
   
     21. The method of  claim 18 , comprising:
 in the case of a low sampling rate input data, adjusting timing for on-time and early/late samples forward or backward by a fraction of chip; and 
 using an interpolator to generate on-time samples, and early/late samples offset by an amount of time derived from the previous samples. 
 
   
   
     22. The method of  claim 16  comprising:
 the adjustment providing timing tracking, the early and late samples are defined as values at half chip interval earlier and half chip interval later than on-time values, respectively; a chip interval established as a time interval to transmit one bit of spreading code; and 
 a frequency of a chip interval is selected as approximately 3.84 MHz/s. 
 
   
   
     23. The method of  claim 16 , wherein the adjustment provides time tracking of multipath components of a direct sequence spread spectrum signal over a wireless multipath fading channel. 
   
   
     24. The method of  claim 16 , wherein the step of generating error signals is performed by jointly calculating the error signals for a plurality of code tracking loops. 
   
   
     25. The method of  claim 24 , wherein the jointly calculated error signals provide an indication of a relative delay τ between two different multipath components of a composite signal. 
   
   
     26. The method of  claim 25 , wherein the relative delay τ between the two different multipath components provides an indication of a delay for signal interference calculation. 
   
   
     27. A radio transmission controller implementing a digital code-tracking loop and configured for operation with wireless communications transmitted in a predetermined slotted time frame format, the radio transmission controller comprising:
 a plurality of despreading circuits, each despreading circuit configured to despread early and late data samples by use of a pseudonoise sequence; 
 a circuit configured to generate error signals from the despread samples generated by the despreading performed by the plurality of despreading circuits; 
 a plurality of circuits corresponding to the plurality of despreading circuits, configured to provide control signals based on a sign but not a magnitude of an accumulation of said generated error signals such that a data rate of the control signal is a fractional proportion of a data rate of said generated error signals; and 
 a circuit configured to provide timing tracking adjustment determined by the control signals, but not the magnitude of the samples or error signals, for a plurality of on-time, early and late samples such that updated timing tracking is provided every 2 frames. 
 
   
   
     28. The radio transmission controller of  claim 27 , wherein:
 the plurality of despreading circuits are configured to provide an indication of a relative delay τ between a plurality of multipath components of a wideband channel such that the relative delay τ between the plurality of multipath components provides an indication of a delay for signal interference calculation. 
 
   
   
     29. The radio transmission controller of  claim 27 , wherein:
 the plurality of despreading circuits are configured to despread data samples which include early despread data samples S e (k) and late despread data samples S l (k), wherein each S e (k) and S l (k) is provided as a complex number and k represents a kth data in a time domain; and 
 the circuit for providing the error signals is configured to provide said error signals as E r (k) according to the following equation:
     E   r ( k )=| S   e ( k )| 2   −|S   l ( k )| 2 . 
 
 
   
   
     30. The radio transmission controller of  claim 27 , wherein said circuit configured to provide said adjustment is configured to provide timing tracking, so as to provide the early and late samples as values at half chip interval earlier and half chip interval later than on-time values, respectively. 
   
   
     31. The radio transmission controller of  claim 30 , wherein:
 the despreading circuits are configured to despread data samples from a plurality of slots of a dedicated physical control channel each slot including 10 symbols, the 10 symbols providing pilot, transmit power control and transport format combination indicator (TFCI) bits. 
 
   
   
     32. The radio transmission controller of  claim 27 , comprising a joint error signal calculator circuit provided as the circuit configured to provide the error signals for at least two of the despreading circuits. 
   
   
     33. The radio transmission controller of  claim 32 , wherein the joint error signal calculator is configured to provide an indication of a relative delay τ between a plurality of multipath components of a composite signal. 
   
   
     34. The radio transmission controller of  claim 33 , wherein the joint error signal calculator is configured to provide the relative delay τ between the plurality of multipath components as an indication of a delay for signal interference calculation.